mb/amd/mandolin: make mandolin a variant of itself
A follow-up patch will add Cereme which is a Mandolin variant. Beware that the name of the EC firmware image is changed from mchp.bin to EC_mandolin.bin. TEST=Mandolin still boots into Linux live system. Change-Id: Ifee91306756f8a4152a6a0224e172dae7eac8f7a Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42785 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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7 changed files with 20 additions and 12 deletions
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@ -7,13 +7,13 @@ config BOARD_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_USE_ESPI
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select SOC_AMD_COMMON_BLOCK_USE_ESPI
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select SOC_AMD_PICASSO
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select SOC_AMD_PICASSO
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_8192
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select BOARD_ROMSIZE_KB_8192 if BOARD_AMD_MANDOLIN
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select AZALIA_PLUGIN_SUPPORT
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select AZALIA_PLUGIN_SUPPORT
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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config FMDFILE
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config FMDFILE
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string
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string
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default "src/mainboard/amd/mandolin/mandolin.fmd"
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default "src/mainboard/amd/mandolin/variants/\$(CONFIG_VARIANT_DIR)/board.fmd"
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config AMD_LPC_DEBUG_CARD
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config AMD_LPC_DEBUG_CARD
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bool "Enable LPC-Serial debug card on the debug header"
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bool "Enable LPC-Serial debug card on the debug header"
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@ -28,15 +28,23 @@ config AMD_LPC_DEBUG_CARD
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config CBFS_SIZE
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config CBFS_SIZE
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hex
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hex
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default 0x7cf000 # Maximum size for the Mandolin FMAP
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default 0x7cf000 if BOARD_AMD_MANDOLIN # Maximum size for the Mandolin FMAP
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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string
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string
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default "amd/mandolin"
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default "amd/mandolin"
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config VARIANT_DIR
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string
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default "mandolin" if BOARD_AMD_MANDOLIN
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config MAINBOARD_PART_NUMBER
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config MAINBOARD_PART_NUMBER
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string
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string
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default "MANDOLIN"
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default "MANDOLIN" if BOARD_AMD_MANDOLIN
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config DEVICETREE
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string
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default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
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config MAX_CPUS
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config MAX_CPUS
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int
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int
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@ -48,7 +56,7 @@ config ONBOARD_VGA_IS_PRIMARY
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config AMD_FWM_POSITION_INDEX
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config AMD_FWM_POSITION_INDEX
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int
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int
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default 3
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default 3 if BOARD_AMD_MANDOLIN
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help
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help
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TODO: might need to be adapted for better placement of files in cbfs
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TODO: might need to be adapted for better placement of files in cbfs
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@ -59,7 +67,7 @@ config MANDOLIN_HAVE_MCHP_FW
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config MANDOLIN_MCHP_FW_FILE
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config MANDOLIN_MCHP_FW_FILE
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string
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string
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depends on MANDOLIN_HAVE_MCHP_FW
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depends on MANDOLIN_HAVE_MCHP_FW
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default "3rdparty/blobs/mainboard/amd/mandolin/mchp.bin"
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default "3rdparty/blobs/mainboard/amd/mandolin/EC_mandolin.bin" if BOARD_AMD_MANDOLIN
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if !AMD_LPC_DEBUG_CARD
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if !AMD_LPC_DEBUG_CARD
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choice MANDOLIN_LPC_IOMUX
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choice MANDOLIN_LPC_IOMUX
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@ -95,6 +103,6 @@ config VGA_BIOS_DGPU_ID
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config VGA_BIOS_DGPU_FILE
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config VGA_BIOS_DGPU_FILE
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string
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string
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default "3rdparty/amd_blobs/picasso/PicassoGenericVbios.bin"
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default "3rdparty/amd_blobs/picasso/PicassoGenericVbios.bin" if BOARD_AMD_MANDOLIN
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endif # BOARD_AMD_MANDOLIN
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endif # BOARD_AMD_MANDOLIN
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@ -1,10 +1,10 @@
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# SPDX-License-Identifier: GPL-2.0-only
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# SPDX-License-Identifier: GPL-2.0-only
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bootblock-y += bootblock.c
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bootblock-y += bootblock.c
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bootblock-y += early_gpio.c
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bootblock-y += variants/$(VARIANT_DIR)/early_gpio.c
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ramstage-y += gpio.c
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ramstage-y += variants/$(VARIANT_DIR)/gpio.c
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ramstage-y += port_descriptors.c
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ramstage-y += variants/$(VARIANT_DIR)/port_descriptors.c
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ifneq ($(CONFIG_PICASSO_LPC_IOMUX),y)
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ifneq ($(CONFIG_PICASSO_LPC_IOMUX),y)
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ramstage-y += emmc_gpio.c
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ramstage-y += emmc_gpio.c
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@ -1,7 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <soc/gpio.h>
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#include <soc/gpio.h>
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#include "gpio.h"
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#include "../../gpio.h"
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/* GPIO pins used by coreboot should be initialized in bootblock */
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/* GPIO pins used by coreboot should be initialized in bootblock */
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@ -1,7 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <soc/gpio.h>
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#include <soc/gpio.h>
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#include "gpio.h"
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#include "../../gpio.h"
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/*
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/*
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* As a rule of thumb, GPIO pins used by coreboot should be initialized at
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* As a rule of thumb, GPIO pins used by coreboot should be initialized at
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