soc/mediatek/mt8188: Add DEVAPC basic driver
Add basic DEVAPC (device access permission control) driver. DEVAPC driver is used to set up bus fabric security and data protection among hardwares. DEVAPC driver groups the master hardwares into different domains and gives secure and non-secure property. The slave hardware can configure different access permissions for different domains via DEVAPC driver. 1. Initialize DEVAPC. 2. Set master domain and secure side band. 3. Set default permission. TEST=check logs of DEVAPC ok. BUG=b:236331724 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com> Change-Id: Iad3569bc6f8ba032d478934ba839dc4b5387bafc Reviewed-on: https://review.coreboot.org/c/coreboot/+/66970 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -29,6 +29,7 @@ romstage-y += ../common/pmif_spmi.c pmif_spmi.c
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romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
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romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
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ramstage-y += ../common/auxadc.c
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ramstage-y += ../common/auxadc.c
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ramstage-y += ../common/devapc.c devapc.c
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ramstage-y += ../common/dfd.c
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ramstage-y += ../common/dfd.c
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ramstage-y += ../common/dpm.c
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ramstage-y += ../common/dpm.c
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ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
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ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
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File diff suppressed because it is too large
Load Diff
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@ -31,6 +31,10 @@ enum {
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PMICSPI_MST_BASE = IO_PHYS + 0x00025000,
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PMICSPI_MST_BASE = IO_PHYS + 0x00025000,
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PMIF_SPMI_BASE = IO_PHYS + 0x00027000,
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PMIF_SPMI_BASE = IO_PHYS + 0x00027000,
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SPMI_MST_BASE = IO_PHYS + 0x00029000,
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SPMI_MST_BASE = IO_PHYS + 0x00029000,
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DEVAPC_INFRA_AO_BASE = IO_PHYS + 0x00030000,
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DEVAPC_PERI_AO_BASE = IO_PHYS + 0x00034000,
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DEVAPC_PERI2_AO_BASE = IO_PHYS + 0x00038000,
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DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0003C000,
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DBG_TRACKER_BASE = IO_PHYS + 0x00208000,
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DBG_TRACKER_BASE = IO_PHYS + 0x00208000,
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PERI_TRACKER_BASE = IO_PHYS + 0x00218000,
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PERI_TRACKER_BASE = IO_PHYS + 0x00218000,
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EMI0_BASE = IO_PHYS + 0x00219000,
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EMI0_BASE = IO_PHYS + 0x00219000,
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@ -0,0 +1,70 @@
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/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
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#ifndef SOC_MEDIATEK_MT8188_DEVAPC_H
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#define SOC_MEDIATEK_MT8188_DEVAPC_H
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#include <device/mmio.h>
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#include <soc/addressmap.h>
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void dapc_init(void);
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enum devapc_ao_offset {
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SYS0_D0_APC_0 = 0x00000,
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SYS1_D0_APC_0 = 0x01000,
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SYS2_D0_APC_0 = 0x02000,
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MAS_DOM_0 = 0x00900,
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MAS_SEC_0 = 0x00A00,
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AO_APC_CON = 0x00F00,
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};
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/******************************************************************************
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* STRUCTURE DEFINITION
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******************************************************************************/
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struct apc_infra_peri_dom_16 {
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unsigned char d_permission[16];
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};
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struct apc_infra_peri_dom_8 {
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unsigned char d_permission[8];
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};
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struct apc_infra_peri_dom_4 {
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unsigned char d_permission[4];
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};
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enum devapc_sys_dom_num {
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DOM_NUM_INFRA_AO_SYS0 = 16,
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DOM_NUM_INFRA_AO_SYS1 = 4,
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DOM_NUM_INFRA_AO_SYS2 = 4,
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DOM_NUM_PERI_AO_SYS0 = 16,
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DOM_NUM_PERI_AO_SYS1 = 8,
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DOM_NUM_PERI2_AO_SYS0 = 16,
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DOM_NUM_PERI_PAR_AO_SYS0 = 16,
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};
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enum devapc_cfg_index {
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DEVAPC_DEBUGSYS_INDEX = 14,
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};
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/* PERM_ATTR MACRO */
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#define DAPC_INFRA_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } }
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#define DAPC_INFRA_AO_SYS1_ATTR(...) { { DAPC_PERM_ATTR_4(__VA_ARGS__) } }
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#define DAPC_INFRA_AO_SYS2_ATTR(...) { { DAPC_PERM_ATTR_4(__VA_ARGS__) } }
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#define DAPC_PERI_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } }
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#define DAPC_PERI_AO_SYS1_ATTR(...) { { DAPC_PERM_ATTR_8(__VA_ARGS__) } }
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#define DAPC_PERI2_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } }
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#define DAPC_PERI_PAR_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } }
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/******************************************************************************
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* Variable DEFINITION
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******************************************************************************/
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#define MOD_NO_IN_1_DEVAPC 16
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#define DOMAIN_OFT 0x40
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#define IDX_OFT 0x4
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/******************************************************************************
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* Bit Field DEFINITION
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******************************************************************************/
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/* TODO */
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#endif /* SOC_MEDIATEK_MT8188_DEVAPC_H */
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@ -3,6 +3,7 @@
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#include <bootmem.h>
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#include <bootmem.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <soc/devapc.h>
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#include <soc/dfd.h>
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#include <soc/dfd.h>
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#include <soc/dpm.h>
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#include <soc/dpm.h>
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#include <soc/emi.h>
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#include <soc/emi.h>
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@ -25,6 +26,7 @@ static void soc_read_resources(struct device *dev)
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static void soc_init(struct device *dev)
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static void soc_init(struct device *dev)
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{
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{
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mtk_mmu_disable_l2c_sram();
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mtk_mmu_disable_l2c_sram();
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dapc_init();
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mcupm_init();
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mcupm_init();
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sspm_init();
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sspm_init();
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