diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index af1381af7d..32c2654c4d 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -83,6 +83,7 @@ config CPU_SPECIFIC_OPTIONS
 	select UDELAY_TSC
 	select ACPI_NHLT
 	select HAVE_FSP_GOP
+	select SOC_INTEL_COMMON_GFX_OPREGION
 
 config MAINBOARD_USES_FSP2_0
 	bool
@@ -93,7 +94,6 @@ config USE_FSP2_0_DRIVER
 	depends on MAINBOARD_USES_FSP2_0
 	select PLATFORM_USES_FSP2_0
 	select ADD_VBT_DATA_FILE if RUN_FSP_GOP
-	select SOC_INTEL_COMMON_GFX_OPREGION
 	select POSTCAR_CONSOLE
 	select POSTCAR_STAGE
 
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index 0a8d10577e..7f618d42be 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -56,7 +56,6 @@ ramstage-y += irq.c
 ramstage-y += lpc.c
 ramstage-y += me.c
 ramstage-y += memmap.c
-ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += opregion.c
 ramstage-y += pch.c
 ramstage-y += pei_data.c
 ramstage-y += pmc.c
diff --git a/src/soc/intel/skylake/igd.c b/src/soc/intel/skylake/igd.c
index 3f35489262..0974f1f401 100644
--- a/src/soc/intel/skylake/igd.c
+++ b/src/soc/intel/skylake/igd.c
@@ -24,7 +24,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <drivers/intel/gma/i915_reg.h>
-#include <fsp/util.h>
+#include <soc/intel/common/opregion.h>
 #include <soc/acpi.h>
 #include <soc/cpu.h>
 #include <soc/pm.h>
diff --git a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
index a0c8a17bb9..6f9362a4bd 100644
--- a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
@@ -19,7 +19,6 @@
 
 #include <chip.h>
 #include <device/device.h>
-#include <fsp/gop.h>
 #include <fsp/ramstage.h>
 #include <fsp/soc_binding.h>
 
@@ -31,7 +30,6 @@ void pch_enable_dev(device_t dev);
 void soc_init_pre_device(void *chip_info);
 void soc_fsp_load(void);
 const char *soc_acpi_name(struct device *dev);
-int init_igd_opregion(igd_opregion_t *igd_opregion);
 extern struct pci_operations soc_pci_ops;
 
 /* Get igd framebuffer bar */
diff --git a/src/soc/intel/skylake/opregion.c b/src/soc/intel/skylake/opregion.c
deleted file mode 100644
index ef7d4ab968..0000000000
--- a/src/soc/intel/skylake/opregion.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2016 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <soc/ramstage.h>
-#include <fsp/gop.h>
-#include <stdlib.h>
-#include <string.h>
-
-enum cb_err init_igd_opregion(igd_opregion_t *opregion)
-{
-	const optionrom_vbt_t *vbt;
-	uint32_t vbt_len;
-
-	memset(opregion, 0, sizeof(igd_opregion_t));
-
-	/* Read VBT table from flash */
-	vbt = fsp_get_vbt(&vbt_len);
-	if (!vbt)
-		die("vbt data not found");
-
-	memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE,
-		sizeof(IGD_OPREGION_SIGNATURE) - 1);
-	memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild,
-		sizeof(u32));
-	memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size <
-		sizeof(opregion->vbt.gvd1) ? vbt->hdr_vbt_size :
-		sizeof(opregion->vbt.gvd1));
-
-	/* Size, in KB, of the entire OpRegion structure (including header)*/
-	opregion->header.size = sizeof(igd_opregion_t) / KiB;
-	opregion->header.version = IGD_OPREGION_VERSION;
-
-	/* We just assume we're mobile for now */
-	opregion->header.mailboxes = MAILBOXES_MOBILE;
-
-	return CB_SUCCESS;
-}