simplify source tree hierarchy: move files from sdram/ and ram/ to lib/

It's only three files. Also fix up all the paths (Gotta love included C files)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2009-09-23 18:51:03 +00:00 committed by Stefan Reinauer
parent a946214ea0
commit c13093b148
118 changed files with 176 additions and 176 deletions

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -29,7 +29,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -29,7 +29,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -27,7 +27,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "cpu/x86/bist.h"
#include "superio/winbond/w83977f/w83977f_early_serial.c"

View File

@ -27,7 +27,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
@ -55,7 +55,7 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/model_lx/cpureginit.c"
#include "cpu/amd/model_lx/syspreinit.c"

View File

@ -88,7 +88,7 @@ static inline int spd_read_byte(u32 device, u32 address)
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/raminit_f.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"
#include "cpu/amd/dualcore/dualcore.c"

View File

@ -27,7 +27,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
@ -53,7 +53,7 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/model_lx/cpureginit.c"
#include "cpu/amd/model_lx/syspreinit.c"

View File

@ -82,7 +82,7 @@ static inline int spd_read_byte(u32 device, u32 address)
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/raminit_f.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"
#include "cpu/amd/dualcore/dualcore.c"

View File

@ -8,7 +8,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
@ -93,7 +93,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
}
#include "northbridge/amd/gx2/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#define PLLMSRhi 0x00001490
#define PLLMSRlo 0x02000030

View File

@ -126,7 +126,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/* tyan does not want the default */
#include "resourcemap.c"

View File

@ -63,7 +63,7 @@ static void post_code(u8 value) {
#if (CONFIG_USE_FAILOVER_IMAGE == 0)
#include "arch/i386/lib/console.c"
#include "pc80/serial.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_10xxx_rev.h>
#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
#include "northbridge/amd/amdfam10/raminit.h"

View File

@ -12,7 +12,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
@ -78,7 +78,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/resourcemap.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#if CONFIG_LOGICAL_CPUS==1
#define SET_NB_CFG_54 1

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
@ -72,7 +72,7 @@ static int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/model_lx/cpureginit.c"
#include "cpu/amd/model_lx/syspreinit.c"

View File

@ -27,7 +27,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "cpu/x86/bist.h"
#include "superio/nsc/pc87351/pc87351_early_serial.c"

View File

@ -28,7 +28,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "superio/nsc/pc87351/pc87351_early_serial.c"
#include "cpu/x86/bist.h"

View File

@ -58,7 +58,7 @@
#include <cpu/amd/model_fxx_rev.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "southbridge/nvidia/ck804/ck804_early_smbus.c"
#include "northbridge/amd/amdk8/raminit.h"
@ -92,7 +92,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/amd/amdk8/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "southbridge/nvidia/ck804/ck804_early_setup_ss.h"
#include "southbridge/nvidia/ck804/ck804_early_setup.c"
#include "cpu/amd/car/copy_and_run.c"

View File

@ -113,7 +113,7 @@ void soft_reset(void)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/dualcore/dualcore.c"
#include "southbridge/via/k8t890/k8t890_early_car.c"
#include "cpu/amd/car/copy_and_run.c"

View File

@ -100,7 +100,7 @@ void activate_spd_rom(const struct mem_controller *ctrl)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/copy_and_run.c"
#include "cpu/amd/car/post_cache_as_ram.c"

View File

@ -29,7 +29,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801xx/i82801xx_early_smbus.c"
#include "northbridge/intel/i82810/raminit.h"
#include "lib/debug.c"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"

View File

@ -30,7 +30,7 @@
#include <cpu/x86/lapic.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -30,7 +30,7 @@
#include <cpu/x86/lapic.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -28,7 +28,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "superio/nsc/pc97317/pc97317_early_serial.c"
#include "cpu/x86/bist.h"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -28,7 +28,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "superio/nsc/pc97317/pc97317_early_serial.c"
#include "cpu/x86/bist.h"

View File

@ -30,7 +30,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/via/cn700/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -21,7 +21,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#if 0
static void post_code(uint8_t value) {
@ -89,7 +89,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/* tyan does not want the default */
#include "resourcemap.c"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -10,7 +10,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "superio/winbond/w83627hf/w83627hf.h"
@ -71,7 +71,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/e7520/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/* IPMI garbage. This is all test stuff, if it really works we'll move it somewhere

View File

@ -14,7 +14,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801dbm/i82801dbm_early_smbus.c"
#include "northbridge/intel/i855pm/raminit.h"
@ -59,7 +59,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/i855pm/raminit.c"
#include "northbridge/intel/i855pm/reset_test.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
static void main(unsigned long bist)
{

View File

@ -9,7 +9,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
//#include "lib/delay.c"
@ -74,7 +74,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
// return smbus_read_byte(device, address);
}
//#include "sdram/generic_sdram.c"
//#include "lib/generic_sdram.c"
static inline void dumpmem(void){
int i, j;

View File

@ -8,7 +8,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
//#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
@ -82,7 +82,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
}
#include "northbridge/amd/lx/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/* CPU and GLIU mult/div */
#define PLLMSRhi 0x0000039C

View File

@ -8,7 +8,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
@ -35,7 +35,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/model_lx/cpureginit.c"
#include "cpu/amd/model_lx/syspreinit.c"

View File

@ -9,7 +9,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
//#include "southbridge/intel/i440bx/i440bx_early_smbus.c"
#include "superio/nsc/pc97317/pc97317_early_serial.c"
//#include "northbridge/intel/i440bx/raminit.h"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -65,7 +65,7 @@
#include "southbridge/sis/sis966/sis966_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#endif
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
@ -121,7 +121,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"

View File

@ -63,7 +63,7 @@
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#endif
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
@ -119,7 +119,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"

View File

@ -65,7 +65,7 @@
#if CONFIG_USE_FAILOVER_IMAGE==0
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
@ -128,7 +128,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
//#include "resourcemap.c"

View File

@ -13,7 +13,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
@ -75,7 +75,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "resourcemap.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#if CONFIG_LOGICAL_CPUS==1
#define SET_NB_CFG_54 1

View File

@ -13,7 +13,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
@ -75,7 +75,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "resourcemap.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#if CONFIG_LOGICAL_CPUS==1
#define SET_NB_CFG_54 1

View File

@ -28,7 +28,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/winbond/w83977f/w83977f_early_serial.c"
#include "cpu/x86/bist.h"
#include "pc80/udelay_io.c"

View File

@ -28,7 +28,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/winbond/w83977tf/w83977tf_early_serial.c"
#include "cpu/x86/bist.h"

View File

@ -27,7 +27,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
@ -60,7 +60,7 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/model_lx/cpureginit.c"
#include "cpu/amd/model_lx/syspreinit.c"

View File

@ -38,7 +38,7 @@
#include "arch/i386/lib/console.c"
#include <cpu/x86/bist.h>
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i3100/i3100_early_smbus.c"
#include "southbridge/intel/i3100/i3100_early_lpc.c"
#include "reset.c"
@ -117,7 +117,7 @@ static inline int spd_read_byte(u16 device, u8 address)
#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/intel/i3100/memory_initialized.c"
#include "northbridge/intel/i3100/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "northbridge/intel/i3100/reset_test.c"
#include "debug.c"

View File

@ -10,7 +10,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "superio/nsc/pc87427/pc87427.h"
@ -49,7 +49,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/e7520/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "debug.c"

View File

@ -30,7 +30,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i3100/i3100_early_smbus.c"
#include "southbridge/intel/i3100/i3100_early_lpc.c"
#include "northbridge/intel/i3100/raminit.h"
@ -57,7 +57,7 @@ static inline int spd_read_byte(u16 device, u8 address)
}
#include "northbridge/intel/i3100/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "../jarrell/debug.c"

View File

@ -31,7 +31,7 @@
#include "pc80/serial.c"
#include "pc80/udelay_io.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i3100/i3100_early_smbus.c"
#include "southbridge/intel/i3100/i3100_early_lpc.c"
#include "northbridge/intel/i3100/raminit_ep80579.h"
@ -57,7 +57,7 @@ static inline int spd_read_byte(u16 device, u8 address)
}
#include "northbridge/intel/i3100/raminit_ep80579.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "../../intel/jarrell/debug.c"
/* #define TRUXTON_DEBUG */

View File

@ -12,7 +12,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ca/i82801ca_early_smbus.c"
#include "northbridge/intel/e7501/raminit.h"
#include "cpu/x86/lapic/boot_cpu.c"
@ -41,7 +41,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/e7501/raminit.c"
#include "northbridge/intel/e7501/reset_test.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
// This function MUST appear last (ROMCC limitation)

View File

@ -106,8 +106,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "sdram/generic_sdram.c"
#include "ram/ramtest.c"
#include "lib/generic_sdram.c"
#include "lib/ramtest.c"
/* tyan does not want the default */
#include "resourcemap.c"

View File

@ -106,8 +106,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "sdram/generic_sdram.c"
#include "ram/ramtest.c"
#include "lib/generic_sdram.c"
#include "lib/ramtest.c"
/* tyan does not want the default */
#include "northbridge/amd/amdk8/resourcemap.c"

View File

@ -106,8 +106,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "sdram/generic_sdram.c"
#include "ram/ramtest.c"
#include "lib/generic_sdram.c"
#include "lib/ramtest.c"
/* tyan does not want the default */
#include "northbridge/amd/amdk8/resourcemap.c"

View File

@ -30,7 +30,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/via/cn700/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"

View File

@ -45,7 +45,7 @@
#include "pc80/usbdebug_direct_serial.c"
#endif
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c"
#include "reset.c"
#include "superio/winbond/w83627thg/w83627thg_early_serial.c"

View File

@ -8,7 +8,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
@ -40,7 +40,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
}
#include "northbridge/amd/gx2/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#define PLLMSRhi 0x00000226
#define PLLMSRlo 0x00000008

View File

@ -31,7 +31,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
@ -61,7 +61,7 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/model_lx/cpureginit.c"
#include "cpu/amd/model_lx/syspreinit.c"

View File

@ -32,7 +32,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
@ -123,7 +123,7 @@ static int smc_send_config(unsigned char config_data)
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/model_lx/cpureginit.c"
#include "cpu/amd/model_lx/syspreinit.c"

View File

@ -29,7 +29,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801xx/i82801xx_early_smbus.c"
#include "northbridge/intel/i82810/raminit.h"
#include "lib/debug.c"

View File

@ -29,7 +29,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -29,7 +29,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"

View File

@ -60,7 +60,7 @@
#include <cpu/amd/model_fxx_rev.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "southbridge/nvidia/ck804/ck804_early_smbus.c"
#include "northbridge/amd/amdk8/raminit.h"
@ -94,7 +94,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/amd/amdk8/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "southbridge/nvidia/ck804/ck804_early_setup_ss.h"
#include "southbridge/nvidia/ck804/ck804_early_setup_car.c"
#include "cpu/amd/car/copy_and_run.c"

View File

@ -68,7 +68,7 @@
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#endif
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
#include "northbridge/amd/amdk8/raminit.h"
@ -107,7 +107,7 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/raminit_f.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"
#include "cpu/amd/dualcore/dualcore.c"

View File

@ -130,7 +130,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/* msi does not want the default */
#include "resourcemap.c"

View File

@ -111,7 +111,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/* msi does not want the default */
#include "resourcemap.c"

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"

View File

@ -17,7 +17,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#if 0
static void post_code(uint8_t value) {
@ -90,7 +90,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/* newisys khepri does not want the default */
#include "resourcemap.c"

View File

@ -63,7 +63,7 @@
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
#include "pc80/usbdebug_direct_serial.c"
#endif
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
@ -118,7 +118,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"

View File

@ -8,7 +8,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
@ -129,7 +129,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
}
#include "northbridge/amd/gx2/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#define PLLMSRhi 0x00001490
#define PLLMSRlo 0x02000030

View File

@ -8,7 +8,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
@ -129,7 +129,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
}
#include "northbridge/amd/gx2/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#define PLLMSRhi 0x00001490
#define PLLMSRlo 0x02000030

View File

@ -28,7 +28,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
@ -115,7 +115,7 @@ static u8 spd_read_byte(u8 device, u8 address)
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/model_lx/cpureginit.c"
#include "cpu/amd/model_lx/syspreinit.c"

View File

@ -30,7 +30,7 @@
#include "pc80/serial.c"
#include "pc80/udelay_io.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "northbridge/intel/i82830/raminit.h"
#include "northbridge/intel/i82830/memory_initialized.c"
@ -69,7 +69,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/i82830/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/**
* The AC'97 Audio Controller I/O space registers are read only by default

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -24,7 +24,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
@ -83,7 +83,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/* tyan does not want the default */
#include "resourcemap.c"

View File

@ -56,7 +56,7 @@
#if CONFIG_USE_FAILOVER_IMAGE==0
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
@ -169,7 +169,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"

View File

@ -60,7 +60,7 @@
#if CONFIG_USE_FAILOVER_IMAGE==0
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
@ -116,7 +116,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit_f.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"

View File

@ -10,7 +10,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/esb6300/esb6300_early_smbus.c"
#include "northbridge/intel/e7525/raminit.h"
#include "superio/winbond/w83627hf/w83627hf.h"
@ -52,7 +52,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/e7525/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
static void main(unsigned long bist)

View File

@ -10,7 +10,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/esb6300/esb6300_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "superio/winbond/w83627hf/w83627hf.h"
@ -70,7 +70,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/e7520/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
static void main(unsigned long bist)

View File

@ -10,7 +10,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "superio/nsc/pc87427/pc87427.h"
@ -70,7 +70,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/e7520/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
static void main(unsigned long bist)

View File

@ -10,7 +10,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/esb6300/esb6300_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "superio/winbond/w83627hf/w83627hf.h"
@ -70,7 +70,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/e7520/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
static void main(unsigned long bist)

View File

@ -10,7 +10,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "superio/winbond/w83627hf/w83627hf.h"
@ -71,7 +71,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/e7520/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
static void main(unsigned long bist)

View File

@ -10,7 +10,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "superio/winbond/w83627hf/w83627hf.h"
@ -71,7 +71,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/e7520/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
static void main(unsigned long bist)

View File

@ -88,7 +88,7 @@ static inline int spd_read_byte(u32 device, u32 address)
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/raminit_f.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"
#include "cpu/amd/dualcore/dualcore.c"

View File

@ -15,7 +15,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "cpu/x86/bist.h"
#define TS5300_LED_OFF outb((inb(0x77)&0xfe), 0x77)

View File

@ -28,7 +28,7 @@
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "superio/nsc/pc97317/pc97317_early_serial.c"
#include "cpu/x86/bist.h"

View File

@ -30,7 +30,7 @@
#include "pc80/serial.c"
#include "pc80/udelay_io.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "northbridge/intel/i82830/raminit.h"
#include "northbridge/intel/i82830/memory_initialized.c"
@ -69,7 +69,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/intel/i82830/raminit.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/**
* The AC'97 Audio Controller I/O space registers are read only by default

View File

@ -29,7 +29,7 @@
#include <stdlib.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"

View File

@ -12,7 +12,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#if 0
static void post_code(uint8_t value) {
@ -74,7 +74,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/e7501/raminit.c"
#include "northbridge/intel/e7501/reset_test.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/x86/car/copy_and_run.c"

View File

@ -13,7 +13,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#if 0
static void post_code(uint8_t value) {
@ -80,7 +80,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/resourcemap.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#if CONFIG_LOGICAL_CPUS==1
#define SET_NB_CFG_54 1

View File

@ -13,7 +13,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
@ -70,7 +70,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "northbridge/amd/amdk8/resourcemap.c"
#if CONFIG_LOGICAL_CPUS==1

View File

@ -13,7 +13,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
@ -72,7 +72,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/resourcemap.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#if CONFIG_LOGICAL_CPUS==1
#define SET_NB_CFG_54 1

View File

@ -18,7 +18,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#if 0
static void post_code(uint8_t value) {
@ -87,7 +87,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "resourcemap.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#include "cpu/amd/dualcore/dualcore.c"

View File

@ -13,7 +13,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
@ -71,7 +71,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/resourcemap.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
#if CONFIG_LOGICAL_CPUS==1
#define SET_NB_CFG_54 1

View File

@ -12,7 +12,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "lib/ramtest.c"
#if 0
static void post_code(uint8_t value) {
@ -81,7 +81,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "lib/generic_sdram.c"
/* tyan does not want the default */
#include "resourcemap.c"

Some files were not shown because too many files have changed in this diff Show More