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sb/amd/sp5100: Apply Sx State Settings per RPR v3.02 

Change-Id: Iacf84ac7de4362e523ad9d8aa7309eecd5277480
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/14308
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
This commit is contained in:
Timothy Pearson 2016-04-10 16:02:42 -05:00
parent d1b6ff80c0
commit c13866fd40
1 changed files with 36 additions and 26 deletions
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12
src/southbridge/amd/sb700/early_setup.c
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@ -607,6 +607,16 @@ static void sb700_pmio_por_init(void)
byte |= 0x20;
pmio_write(0x66, byte);
if (IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100)) {
/* RPR 2.11 Sx State Settings */
byte = pmio_read(0x65);
byte &= ~(1 << 7); /* SpecialFunc = 0 */
pmio_write(0x65, byte);
byte = pmio_read(0x68);
byte |= 1 << 2; /* MaskApicEn = 1 */
pmio_write(0x68, byte);
} else {
/* RPR2.31 PM_TURN_OFF_MSG during ASF Shutdown. */
if (get_sb700_revision(pci_locate_device(PCI_ID(0x1002, 0x4385), 0)) <= 0x12) {
byte = pmio_read(0x65);
@ -640,7 +650,7 @@ static void sb700_pmio_por_init(void)
byte &= 0xc0;
byte |= 0x02;
pmio_write(0x52, byte);
}
}
/* Watch Dog Timer Control