diff --git a/src/mainboard/google/falco/Kconfig b/src/mainboard/google/falco/Kconfig
index c3b95a23da..27fd3be3a9 100644
--- a/src/mainboard/google/falco/Kconfig
+++ b/src/mainboard/google/falco/Kconfig
@@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select MAINBOARD_HAS_CHROMEOS
 	select EXTERNAL_MRC_BLOB
 	select MONOTONIC_TIMER_MSR
-	select DRIVERS_I2C_RTD2132
 
 config VBOOT_RAMSTAGE_INDEX
 	hex
diff --git a/src/mainboard/google/falco/devicetree.cb b/src/mainboard/google/falco/devicetree.cb
index ab8beaec2f..428a0609aa 100644
--- a/src/mainboard/google/falco/devicetree.cb
+++ b/src/mainboard/google/falco/devicetree.cb
@@ -114,34 +114,7 @@ chip northbridge/intel/haswell
 				end
 			end # LPC bridge
 			device pci 1f.2 on end # SATA Controller
-			device pci 1f.3 on # SMBus
-				chip drivers/i2c/rtd2132
-					# Panel Power Timings (1 ms units)
-					# Note: the panel Tx timings are very
-					# different from the LVDS bridge
-					# Tx timing settings. Below is a mapping
-					# for RTD2132 -> Panel timings.
-					# T1 = T2
-					# T2 = T8 + T10 + T12
-					# T3 = T14
-					# T4 = T15
-					# T5 = T9 + T11 + T13
-					# T6 = T3
-					# T7 = T4
-					register "t1" = "20"
-					register "t2" = "16"
-					register "t3" = "1"
-					register "t4" = "1"
-					register "t5" = "16"
-					register "t6" = "20"
-					register "t7" = "500"
-					# LVDS Swap settings are normal.
-					register "lvds_swap" = "0"
-					# Enable Spread Sprectrum at 1.0%
-					register "sscg_percent" = "0x10"
-					device i2c 35 on end
-				end
-			end
+			device pci 1f.3 on end # SMBus
 			device pci 1f.6 on end # Thermal
 		end
 	end