superio/common: Add ssdtgen for generic SuperIOs
Add a generic SuperIO ACPI generator, dropping the need to include additional code in DSDT for SuperIO. It generates a device HID based on the decoded I/O range. Tested on Supermicro X11SSH-TF using AST2400. The SSDT contains no errors and all devices are present. Possible TODOs: * Add "enter config" and "exit config" bytes * Generate support methods to enter and exit config mode * Generate support methods to query, change or disable current resource settings on specific LDNs Change-Id: I2716ae0580d68e5d4fcc484cb1648a2cdc1f4ca0 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33033 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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# SuperIO SSTD generator
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This page describes the common SSDT ACPI generator for SuperIO chips that can
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be found in coreboot.
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## Functional description
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In order to automatically generate ACPI functions you need to add
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a new `chip superio/common` and `device pnp xx.0 on` to your devicetree.
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The xx denotes the hexadecimal address of the SuperIO.
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Place the regular LDN pnp devices behind those two entries.
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The code will automatically guess the function based on the decoded
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I/O range and ISA IRQ number.
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## Example devicetree.cb
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This example is based on AST2400.
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```code
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# Add a "container" for proper ACPI code generation
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chip superio/common
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device pnp 2e.0 on # just for the base device, not for the LDNs
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chip superio/aspeed/ast2400
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device pnp 2e.0 off end
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device pnp 2e.2 on # SUART1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 on # SUART2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.4 on # SWC
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io 0x60 = 0xa00
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io 0x62 = 0xa10
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io 0x64 = 0xa20
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io 0x66 = 0xa30
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irq 0x70 = 0
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end
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end
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end
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end
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```
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## TODO
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1) Add ACPI HIDs to every SuperIO driver
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2) Don't guess ACPI HID of LDNs if it's known
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3) Add "enter config" and "exit config" bytes
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4) Generate support methods that allow
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* Setting resource settings at runtime
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* Getting resource settings at runtime
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* Disabling LDNs at runtime
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@ -5,3 +5,6 @@ This section contains documentation about coreboot on specific SuperIOs.
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## Nuvoton
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## Nuvoton
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- [NPCD378](nuvoton/npcd378.md)
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- [NPCD378](nuvoton/npcd378.md)
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## Common
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- [SSDT generator for generic SuperIOs](common/ssdt.md)
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@ -129,6 +129,14 @@ typedef struct acpi_gen_regaddr {
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#define ACPI_ACCESS_SIZE_DWORD_ACCESS 3
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#define ACPI_ACCESS_SIZE_DWORD_ACCESS 3
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#define ACPI_ACCESS_SIZE_QWORD_ACCESS 4
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#define ACPI_ACCESS_SIZE_QWORD_ACCESS 4
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/* Common ACPI HIDs */
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#define ACPI_HID_FDC "PNP0700"
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#define ACPI_HID_KEYBOARD "PNP0303"
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#define ACPI_HID_MOUSE "PNP0F03"
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#define ACPI_HID_COM "PNP0501"
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#define ACPI_HID_LPT "PNP0400"
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#define ACPI_HID_PNP "PNP0C02"
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/* Generic ACPI header, provided by (almost) all tables */
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/* Generic ACPI header, provided by (almost) all tables */
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typedef struct acpi_table_header {
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typedef struct acpi_table_header {
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char signature[4]; /* ACPI signature (4 ASCII characters) */
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char signature[4]; /* ACPI signature (4 ASCII characters) */
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SUPERIO_COMMON_CHIP_H__
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#define __SUPERIO_COMMON_CHIP_H__
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struct superio_common_config {
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/* FIXME: Add enter conf/exit conf codes here for SSDT generation */
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};
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#endif /* __SUPERIO_COMMON_CHIP_H__ */
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <device/pnp.h>
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#include <arch/acpigen.h>
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#include <device/pnp_def.h>
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#include <console/console.h>
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static void generic_set_resources(struct device *dev)
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{
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struct resource *res;
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for (res = dev->resource_list; res; res = res->next) {
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if (!(res->flags & IORESOURCE_ASSIGNED))
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continue;
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res->flags |= IORESOURCE_STORED;
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report_resource_stored(dev, res, "");
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}
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}
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static void generic_read_resources(struct device *dev)
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{
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struct resource *res = new_resource(dev, 0);
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res->base = dev->path.pnp.port;
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res->size = 2;
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res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
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}
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#if CONFIG(HAVE_ACPI_TABLES)
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static void generic_ssdt(struct device *dev)
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{
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const char *scope = acpi_device_scope(dev);
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const char *name = acpi_device_name(dev);
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if (!scope || !name) {
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printk(BIOS_ERR, "%s: Missing ACPI path/scope\n",
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dev_path(dev));
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return;
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}
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/* Device */
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acpigen_write_scope(scope);
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acpigen_write_device(name);
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printk(BIOS_DEBUG, "%s.%s: %s\n", scope, name, dev_path(dev));
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acpigen_write_name_string("_HID", "PNP0C02");
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acpigen_write_name_string("_DDN", dev_name(dev));
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/* OperationRegion("IOID", SYSTEMIO, port, 2) */
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struct opregion opreg = OPREGION("IOID", SYSTEMIO, dev->path.pnp.port, 2);
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acpigen_write_opregion(&opreg);
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struct fieldlist l[] = {
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FIELDLIST_OFFSET(0),
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FIELDLIST_NAMESTR("INDX", 8),
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FIELDLIST_NAMESTR("DATA", 8),
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};
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/* Field (IOID, AnyAcc, NoLock, Preserve)
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* {
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* Offset (0),
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* INDX, 8,
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* DATA, 8,
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* } */
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acpigen_write_field(opreg.name, l, ARRAY_SIZE(l), FIELD_BYTEACC | FIELD_NOLOCK |
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FIELD_PRESERVE);
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struct fieldlist i[] = {
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FIELDLIST_OFFSET(0x07),
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FIELDLIST_NAMESTR("LDN", 8),
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FIELDLIST_OFFSET(0x21),
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FIELDLIST_NAMESTR("SCF1", 8),
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FIELDLIST_NAMESTR("SCF2", 8),
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FIELDLIST_NAMESTR("SCF3", 8),
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FIELDLIST_NAMESTR("SCF4", 8),
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FIELDLIST_NAMESTR("SCF5", 8),
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FIELDLIST_NAMESTR("SCF6", 8),
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FIELDLIST_NAMESTR("SCF7", 8),
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FIELDLIST_OFFSET(0x29),
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FIELDLIST_NAMESTR("CKCF", 8),
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FIELDLIST_OFFSET(0x2F),
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FIELDLIST_NAMESTR("SCFF", 8),
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FIELDLIST_OFFSET(0x30),
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FIELDLIST_NAMESTR("ACT0", 1),
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FIELDLIST_NAMESTR("ACT1", 1),
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FIELDLIST_NAMESTR("ACT2", 1),
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FIELDLIST_NAMESTR("ACT3", 1),
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FIELDLIST_NAMESTR("ACT4", 1),
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FIELDLIST_NAMESTR("ACT5", 1),
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FIELDLIST_NAMESTR("ACT6", 1),
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FIELDLIST_NAMESTR("ACT7", 1),
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FIELDLIST_OFFSET(0x60),
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FIELDLIST_NAMESTR("IOH0", 8),
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FIELDLIST_NAMESTR("IOL0", 8),
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FIELDLIST_NAMESTR("IOH1", 8),
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FIELDLIST_NAMESTR("IOL1", 8),
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FIELDLIST_NAMESTR("IOH2", 8),
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FIELDLIST_NAMESTR("IOL2", 8),
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FIELDLIST_NAMESTR("IOH3", 8),
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FIELDLIST_NAMESTR("IOL3", 8),
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FIELDLIST_OFFSET(0x70),
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FIELDLIST_NAMESTR("INTR", 4),
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FIELDLIST_OFFSET(0x71),
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FIELDLIST_NAMESTR("INTT", 2),
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FIELDLIST_OFFSET(0x72),
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FIELDLIST_NAMESTR("ITR2", 4),
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FIELDLIST_OFFSET(0x73),
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FIELDLIST_NAMESTR("ITR2", 2),
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FIELDLIST_OFFSET(0x74),
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FIELDLIST_NAMESTR("DMCH", 8),
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FIELDLIST_OFFSET(0xE0),
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FIELDLIST_NAMESTR("RGE0", 8),
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FIELDLIST_NAMESTR("RGE1", 8),
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FIELDLIST_NAMESTR("RGE2", 8),
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FIELDLIST_NAMESTR("RGE3", 8),
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FIELDLIST_NAMESTR("RGE4", 8),
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FIELDLIST_NAMESTR("RGE5", 8),
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FIELDLIST_NAMESTR("RGE6", 8),
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FIELDLIST_NAMESTR("RGE7", 8),
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FIELDLIST_NAMESTR("RGE8", 8),
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FIELDLIST_NAMESTR("RGE9", 8),
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FIELDLIST_NAMESTR("RGEA", 8),
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FIELDLIST_OFFSET(0xF0),
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FIELDLIST_NAMESTR("OPT0", 8),
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FIELDLIST_NAMESTR("OPT1", 8),
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FIELDLIST_NAMESTR("OPT2", 8),
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FIELDLIST_NAMESTR("OPT3", 8),
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FIELDLIST_NAMESTR("OPT4", 8),
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FIELDLIST_NAMESTR("OPT5", 8),
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FIELDLIST_NAMESTR("OPT6", 8),
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FIELDLIST_NAMESTR("OPT7", 8),
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FIELDLIST_NAMESTR("OPT8", 8),
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FIELDLIST_NAMESTR("OPT9", 8),
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};
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acpigen_write_indexfield("INDX", "DATA", i, ARRAY_SIZE(i), FIELD_BYTEACC |
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FIELD_NOLOCK | FIELD_PRESERVE);
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acpigen_pop_len(); /* Device */
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acpigen_pop_len(); /* Scope */
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}
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static const char *generic_acpi_name(const struct device *dev)
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{
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return "SIO0";
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}
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#endif
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static struct device_operations ops = {
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.read_resources = generic_read_resources,
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.set_resources = generic_set_resources,
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.enable_resources = DEVICE_NOOP,
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#if CONFIG(HAVE_ACPI_TABLES)
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.acpi_fill_ssdt_generator = generic_ssdt,
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.acpi_name = generic_acpi_name,
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#endif
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};
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static void enable_dev(struct device *dev)
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{
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if (dev->path.type != DEVICE_PATH_PNP)
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printk(BIOS_ERR, "%s: Unsupported device type\n", dev_path(dev));
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else if (!dev->path.pnp.port)
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printk(BIOS_ERR, "%s: Base address not set\n", dev_path(dev));
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else
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dev->ops = &ops;
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/*
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* Need to call enable_dev() on the devices "behind" the Generic Super I/O.
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* coreboot's generic allocator doesn't expect them behind PnP devices.
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*/
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scan_static_bus(dev);
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}
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struct chip_operations superio_common_ops = {
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CHIP_NAME("Generic Super I/O")
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.enable_dev = enable_dev,
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};
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@ -0,0 +1,247 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <superio/common/ssdt.h>
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#include <device/device.h>
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#include <device/pnp.h>
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#include <arch/acpigen.h>
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#include <arch/acpi.h>
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#include <device/pnp_def.h>
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#include <console/console.h>
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#include <types.h>
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struct superio_dev {
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const char *acpi_hid;
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u16 io_base[4];
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u8 irq[2];
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};
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static const struct superio_dev superio_devs[] = {
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{ACPI_HID_FDC, {0x3f0, 0x3f2, 0x3f7}, {6, } },
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{ACPI_HID_KEYBOARD, {60, 64, }, {1, } },
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{ACPI_HID_MOUSE, {60, 64, }, {12, } },
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{ACPI_HID_COM, {0x3f8, 0x2f8, 0x3e8, 0x2e8}, {4, 3} },
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{ACPI_HID_LPT, {0x378, }, {7, } },
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};
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static const u8 io_idx[] = {PNP_IDX_IO0, PNP_IDX_IO1, PNP_IDX_IO2, PNP_IDX_IO3};
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static const u8 irq_idx[] = {PNP_IDX_IRQ0, PNP_IDX_IRQ1};
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static const struct superio_dev *superio_guess_function(struct device *dev)
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{
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for (size_t i = 0; i < ARRAY_SIZE(io_idx); i++) {
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struct resource *res = probe_resource(dev, io_idx[i]);
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if (!res || !res->base)
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continue;
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for (size_t j = 0; j < ARRAY_SIZE(superio_devs); j++) {
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for (size_t k = 0; k < 4; k++) {
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if (!superio_devs[j].io_base[k])
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continue;
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if (superio_devs[j].io_base[k] == res->base)
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return &superio_devs[j];
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}
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}
|
||||||
|
}
|
||||||
|
for (size_t i = 0; i < ARRAY_SIZE(irq_idx); i++) {
|
||||||
|
struct resource *res = probe_resource(dev, irq_idx[i]);
|
||||||
|
if (!res || !res->size)
|
||||||
|
continue;
|
||||||
|
for (size_t j = 0; j < ARRAY_SIZE(superio_devs); j++) {
|
||||||
|
for (size_t k = 0; k < 2; k++) {
|
||||||
|
if (!superio_devs[j].irq[k])
|
||||||
|
continue;
|
||||||
|
if (superio_devs[j].irq[k] == res->base)
|
||||||
|
return &superio_devs[j];
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Return true if there are resources to report */
|
||||||
|
static bool has_resources(struct device *dev)
|
||||||
|
{
|
||||||
|
for (size_t i = 0; i < ARRAY_SIZE(io_idx); i++) {
|
||||||
|
struct resource *res = probe_resource(dev, io_idx[i]);
|
||||||
|
if (!res || !res->base || !res->size)
|
||||||
|
continue;
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
for (size_t i = 0; i < ARRAY_SIZE(irq_idx); i++) {
|
||||||
|
struct resource *res = probe_resource(dev, irq_idx[i]);
|
||||||
|
if (!res || !res->size || res->base > 16)
|
||||||
|
continue;
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Add IO and IRQ resources for _CRS or _PRS */
|
||||||
|
static void ldn_gen_resources(struct device *dev)
|
||||||
|
{
|
||||||
|
uint16_t irq = 0;
|
||||||
|
for (size_t i = 0; i < ARRAY_SIZE(io_idx); i++) {
|
||||||
|
struct resource *res = probe_resource(dev, io_idx[i]);
|
||||||
|
if (!res || !res->base)
|
||||||
|
continue;
|
||||||
|
resource_t base = res->base;
|
||||||
|
resource_t size = res->size;
|
||||||
|
while (size > 0) {
|
||||||
|
resource_t sz = size > 255 ? 255 : size;
|
||||||
|
/* TODO: Needs test with regions >= 256 bytes */
|
||||||
|
acpigen_write_io16(base, base, 1, sz, 1);
|
||||||
|
size -= sz;
|
||||||
|
base += sz;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
for (size_t i = 0; i < ARRAY_SIZE(irq_idx); i++) {
|
||||||
|
struct resource *res = probe_resource(dev, irq_idx[i]);
|
||||||
|
if (!res || !res->size || res->base >= 16)
|
||||||
|
continue;
|
||||||
|
irq |= 1 << res->base;
|
||||||
|
}
|
||||||
|
if (irq)
|
||||||
|
acpigen_write_irq(irq);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Add resource base and size for additional SuperIO code */
|
||||||
|
static void ldn_gen_resources_use(struct device *dev)
|
||||||
|
{
|
||||||
|
char name[5];
|
||||||
|
for (size_t i = 0; i < ARRAY_SIZE(io_idx); i++) {
|
||||||
|
struct resource *res = probe_resource(dev, io_idx[i]);
|
||||||
|
if (!res || !res->base || !res->size)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
snprintf(name, sizeof(name), "IO%XB", i);
|
||||||
|
name[4] = '\0';
|
||||||
|
acpigen_write_name_integer(name, res->base);
|
||||||
|
|
||||||
|
snprintf(name, sizeof(name), "IO%XS", i);
|
||||||
|
name[4] = '\0';
|
||||||
|
acpigen_write_name_integer(name, res->size);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
const char *superio_common_ldn_acpi_name(const struct device *dev)
|
||||||
|
{
|
||||||
|
u8 ldn = dev->path.pnp.device & 0xff;
|
||||||
|
u8 vldn = (dev->path.pnp.device >> 8) & 0x7;
|
||||||
|
static char name[5];
|
||||||
|
|
||||||
|
snprintf(name, sizeof(name), "L%02X%01X", ldn, vldn);
|
||||||
|
|
||||||
|
name[4] = '\0';
|
||||||
|
|
||||||
|
return name;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const char *name_from_hid(const char *hid)
|
||||||
|
{
|
||||||
|
static const struct {
|
||||||
|
const char *hid;
|
||||||
|
const char *name;
|
||||||
|
} lookup[] = {
|
||||||
|
{ACPI_HID_FDC, "FDC" },
|
||||||
|
{ACPI_HID_KEYBOARD, "PS2 Keyboard" },
|
||||||
|
{ACPI_HID_MOUSE, "PS2 Mouse"},
|
||||||
|
{ACPI_HID_COM, "COM port" },
|
||||||
|
{ACPI_HID_LPT, "LPT" },
|
||||||
|
{ACPI_HID_PNP, "Generic PNP device" },
|
||||||
|
};
|
||||||
|
|
||||||
|
for (size_t i = 0; hid && i < ARRAY_SIZE(lookup); i++) {
|
||||||
|
if (strcmp(hid, lookup[i].hid) == 0)
|
||||||
|
return lookup[i].name;
|
||||||
|
}
|
||||||
|
return "Generic device";
|
||||||
|
}
|
||||||
|
|
||||||
|
void superio_common_fill_ssdt_generator(struct device *dev)
|
||||||
|
{
|
||||||
|
const char *scope = acpi_device_scope(dev);
|
||||||
|
const char *name = acpi_device_name(dev);
|
||||||
|
const u8 ldn = dev->path.pnp.device & 0xff;
|
||||||
|
const u8 vldn = (dev->path.pnp.device >> 8) & 0x7;
|
||||||
|
const char *hid;
|
||||||
|
|
||||||
|
if (!scope || !name) {
|
||||||
|
printk(BIOS_ERR, "%s: Missing ACPI path/scope\n", dev_path(dev));
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if (vldn) {
|
||||||
|
printk(BIOS_DEBUG, "%s: Ignoring virtual LDN\n", dev_path(dev));
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
printk(BIOS_DEBUG, "%s.%s: %s\n", scope, name, dev_path(dev));
|
||||||
|
|
||||||
|
/* Scope */
|
||||||
|
acpigen_write_scope(scope);
|
||||||
|
|
||||||
|
/* Device */
|
||||||
|
acpigen_write_device(name);
|
||||||
|
|
||||||
|
acpigen_write_name_byte("_UID", 0);
|
||||||
|
acpigen_write_name_byte("LDN", ldn);
|
||||||
|
acpigen_write_name_byte("VLDN", vldn);
|
||||||
|
|
||||||
|
acpigen_write_STA(dev->enabled ? 0xf : 0);
|
||||||
|
|
||||||
|
if (!dev->enabled) {
|
||||||
|
acpigen_pop_len(); /* Device */
|
||||||
|
acpigen_pop_len(); /* Scope */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (has_resources(dev)) {
|
||||||
|
/* Resources - _CRS */
|
||||||
|
acpigen_write_name("_CRS");
|
||||||
|
acpigen_write_resourcetemplate_header();
|
||||||
|
ldn_gen_resources(dev);
|
||||||
|
acpigen_write_resourcetemplate_footer();
|
||||||
|
|
||||||
|
/* Resources - _PRS */
|
||||||
|
acpigen_write_name("_PRS");
|
||||||
|
acpigen_write_resourcetemplate_header();
|
||||||
|
ldn_gen_resources(dev);
|
||||||
|
acpigen_write_resourcetemplate_footer();
|
||||||
|
|
||||||
|
/* Resources base and size for 3rd party ACPI code */
|
||||||
|
ldn_gen_resources_use(dev);
|
||||||
|
}
|
||||||
|
|
||||||
|
hid = acpi_device_hid(dev);
|
||||||
|
if (!hid) {
|
||||||
|
printk(BIOS_ERR, "%s: SuperIO driver doesn't provide a _HID\n", dev_path(dev));
|
||||||
|
/* Try to guess it... */
|
||||||
|
const struct superio_dev *sdev = superio_guess_function(dev);
|
||||||
|
if (sdev && sdev->acpi_hid) {
|
||||||
|
hid = sdev->acpi_hid;
|
||||||
|
printk(BIOS_WARNING, "%s: Guessed _HID is '%s'\n", dev_path(dev), hid);
|
||||||
|
} else {
|
||||||
|
hid = ACPI_HID_PNP;
|
||||||
|
printk(BIOS_ERR, "%s: Failed to guessed _HID\n", dev_path(dev));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
acpigen_write_name_string("_HID", hid);
|
||||||
|
acpigen_write_name_string("_DDN", name_from_hid(hid));
|
||||||
|
|
||||||
|
acpigen_pop_len(); /* Device */
|
||||||
|
acpigen_pop_len(); /* Scope */
|
||||||
|
}
|
|
@ -0,0 +1,23 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the coreboot project.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __SUPERIO_COMMON_SSDT_H__
|
||||||
|
#define __SUPERIO_COMMON_SSDT_H__
|
||||||
|
|
||||||
|
#include <device/device.h>
|
||||||
|
|
||||||
|
const char *superio_common_ldn_acpi_name(const struct device *dev);
|
||||||
|
void superio_common_fill_ssdt_generator(struct device *dev);
|
||||||
|
|
||||||
|
#endif /* __SUPERIO_COMMON_SSDT_H__ */
|
Loading…
Reference in New Issue