util/superiotool: dump VT1211 registers

Change-Id: Id01b72a2194ebf3359a11c3ff382efaedf28f9e1
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22255
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Lubomir Rintel 2017-10-31 09:25:23 +01:00 committed by Stefan Reinauer
parent 4d1bbe9908
commit c1633045be
1 changed files with 41 additions and 0 deletions

View File

@ -26,6 +26,47 @@ static const struct superio_registers reg_table[] = {
{0x3c00, "VT82C686A/VT82C686B", { {0x3c00, "VT82C686A/VT82C686B", {
{EOT}}}, {EOT}}},
{0x3c01, "VT1211", { {0x3c01, "VT1211", {
{NOLDN, NULL,
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
0x2e,0x2f,EOT},
{0x3c,0x01,0x00,0x11,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,EOT}},
{0x0, "Floppy Disk Controller (FDC)",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x03,0xf0,0x06,0x01,0x00,0x00,EOT}},
{0x1, "Parallel Port (PP)",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x03,0x03,0x78,0x05,0x00,0x00,EOT}},
{0x2, "Serial Port 1 (UART1)",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x03,0xf8,0x04,0x00,EOT}},
{0x3, "Serial Port 2 (UART2)",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x02,0xf8,0x03,0x00,EOT}},
{0x6, "MIDI",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x03,0x30,0x00,EOT}},
{0x7, "Game Port (GMP)",
{0x30,0x60,0x61,EOT},
{0x00,0x02,0x00,EOT}},
{0x8, "GPIO",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0xe9,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x9, "Watch Dog (WDG)",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0xea,0x00,0x00,0x00,EOT}},
{0xa, "Wake-up Control (WUC)",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0xeb,0x00,0x00,EOT}},
{0xb, "Hardware Monitor (HM)",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0xec,0x00,0x00,EOT}},
{0xc, "Very Fast IR (VFIR)",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x00,0xe8,0x00,0x00,0x06,0x00,EOT}},
{0xd, "Flash ROM (ROM)",
{0x30,0xf0,EOT},
{0x01,0x00,EOT}},
{EOT}}}, {EOT}}},
{EOT} {EOT}
}; };