mb/google/brya/{redrix,taeko}: Deduplicate lockdown config
Lockdown configuration is done in their baseboards. Thus, remove the setting from the variants overridetree. Change-Id: Iadb1201718466503987e4f6bd72bf711a2d3128e Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56964 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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@ -22,7 +22,6 @@ chip soc/intel/alderlake
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#+-------------------+---------------------------+
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#+-------------------+---------------------------+
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#| Field | Value |
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#| Field | Value |
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#+-------------------+---------------------------+
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#+-------------------+---------------------------+
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#| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
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#| GSPI1 | Fingerprint MCU |
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#| GSPI1 | Fingerprint MCU |
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#| I2C0 | Audio |
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#| I2C0 | Audio |
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#| I2C1 | Touchscreen |
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#| I2C1 | Touchscreen |
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@ -33,7 +32,6 @@ chip soc/intel/alderlake
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#| I2C5 | Trackpad |
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#| I2C5 | Trackpad |
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#+-------------------+---------------------------+
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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register "common_soc_config" = "{
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.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
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.i2c[0] = {
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.i2c[0] = {
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.speed = I2C_SPEED_FAST,
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.speed = I2C_SPEED_FAST,
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},
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},
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@ -8,7 +8,6 @@ chip soc/intel/alderlake
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#+-------------------+---------------------------+
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#+-------------------+---------------------------+
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#| Field | Value |
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#| Field | Value |
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#+-------------------+---------------------------+
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#+-------------------+---------------------------+
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#| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
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#| GSPI1 | Fingerprint MCU |
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#| GSPI1 | Fingerprint MCU |
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#| I2C0 | Audio |
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#| I2C0 | Audio |
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#| I2C1 | Touchscreen |
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#| I2C1 | Touchscreen |
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@ -18,7 +17,6 @@ chip soc/intel/alderlake
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#| | for TPM communication |
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#| | for TPM communication |
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#| I2C5 | Trackpad |
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#| I2C5 | Trackpad |
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#+-------------------+---------------------------+
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#+-------------------+---------------------------+
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register "common_soc_config.chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
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register "common_soc_config" = "{
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register "common_soc_config" = "{
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.i2c[0] = {
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.i2c[0] = {
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.speed = I2C_SPEED_FAST,
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.speed = I2C_SPEED_FAST,
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