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sb/intel/i82801ix: drop IGD-related NVS variables 

NDID/DID entries are no longer used by the GMA SSDT generator, so
drop them. SSDT generation will be simplified in a subsequent commit.

Remove direct setting of gnvs->ndid in qemu-q35 board since build
will otherwise break.

Change-Id: Ifbf08f43291c1fff7ccbc85272dc97334207983b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39954
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2020-03-30 21:56:07 -05:00
parent 28f727b59b
commit c19c704c02
4 changed files with 1 additions and 21 deletions
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3
src/mainboard/emulation/qemu-q35/acpi_tables.c
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@ -33,9 +33,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* Enable both COM ports */ /* Enable both COM ports */
gnvs->cmap = 0x01; gnvs->cmap = 0x01;
gnvs->cmbp = 0x01; gnvs->cmbp = 0x01;
/* IGD Displays */
gnvs->ndid = 0; /* Will use default of 0x00000400. */
} }

7
src/southbridge/intel/i82801ix/acpi/globalnvs.asl
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@ -91,13 +91,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
TLST, 8, // 0x3d - Display Toggle List pointer TLST, 8, // 0x3d - Display Toggle List pointer
CADL, 8, // 0x3e - Currently Attached Devices List CADL, 8, // 0x3e - Currently Attached Devices List
PADL, 8, // 0x3f - Previously Attached Devices List PADL, 8, // 0x3f - Previously Attached Devices List
Offset (0x46),
NDID, 8, // 0x46 - Number of Device IDs
DID1, 32, // 0x47 - Device ID 1
DID2, 32, // 0x4b - Device ID 2
DID3, 32, // 0x4f - Device ID 3
DID4, 32, // 0x53 - Device ID 4
DID5, 32, // 0x57 - Device ID 5
/* Backlight Control */ /* Backlight Control */
Offset (0x64), Offset (0x64),
BLCS, 8, // 0x64 - Backlight control possible? BLCS, 8, // 0x64 - Backlight control possible?

7
src/southbridge/intel/i82801ix/lpc.c
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@ -33,7 +33,6 @@
#include "i82801ix.h" #include "i82801ix.h"
#include "nvs.h" #include "nvs.h"
#include <southbridge/intel/common/pciehp.h> #include <southbridge/intel/common/pciehp.h>
#include <drivers/intel/gma/i915.h>
#include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/acpi_pirq_gen.h>
#define NMI_OFF 0 #define NMI_OFF 0
@ -488,15 +487,9 @@ static void southbridge_inject_dsdt(struct device *dev)
global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
if (gnvs) { if (gnvs) {
const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
memset(gnvs, 0, sizeof(*gnvs)); memset(gnvs, 0, sizeof(*gnvs));
acpi_create_gnvs(gnvs); acpi_create_gnvs(gnvs);
if (gfx) {
gnvs->ndid = gfx->ndid;
memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
}
/* And tell SMI about it */ /* And tell SMI about it */
smm_setup_structures(gnvs, NULL, NULL); smm_setup_structures(gnvs, NULL, NULL);

5
src/southbridge/intel/i82801ix/nvs.h
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@ -73,10 +73,7 @@ typedef struct {
u8 tlst; /* 0x3d - Display Toggle List Pointer */ u8 tlst; /* 0x3d - Display Toggle List Pointer */
u8 cadl; /* 0x3e - currently attached devices */ u8 cadl; /* 0x3e - currently attached devices */
u8 padl; /* 0x3f - previously attached devices */ u8 padl; /* 0x3f - previously attached devices */
u16 rsvd14[3]; u8 rsvd5[36];
u8 ndid; /* 0x46 - number of device ids */
u32 did[5]; /* 0x47 - 5b device id 1..5 */
u8 rsvd5[0x9];
/* Backlight Control */ /* Backlight Control */
u8 blcs; /* 0x64 - Backlight Control possible */ u8 blcs; /* 0x64 - Backlight Control possible */
u8 brtl; u8 brtl;