device/pci: Replace use of dev_find_slot() for IRQs
Change-Id: I48c0de73338430282ce1a4442bbeb7c867dc174c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34079 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -177,7 +177,7 @@ static void pirq_route_irqs(unsigned long addr)
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}
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/* Bus, device, slots IRQs for {A,B,C,D}. */
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pci_assign_irqs(bus, devfn >> 3, irq_slot);
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pci_assign_irqs(pcidev_path_on_bus(bus, devfn), irq_slot);
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}
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for (i = 0; i < CONFIG_MAX_PIRQ_LINKS; i++)
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@ -1499,27 +1499,24 @@ int get_pci_irq_pins(struct device *dev, struct device **parent_bdg)
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*
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* This function should be called for each PCI slot in your system.
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*
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* @param bus Pointer to the bus structure.
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* @param slot TODO
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* @param dev Pointer to dev structure.
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* @param pIntAtoD An array of IRQ #s that are assigned to PINTA through PINTD
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* of this slot. The particular IRQ #s that are passed in depend on the
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* routing inside your southbridge and on your board.
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*/
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void pci_assign_irqs(unsigned bus, unsigned slot,
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const unsigned char pIntAtoD[4])
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void pci_assign_irqs(struct device *dev, const unsigned char pIntAtoD[4])
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{
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unsigned int funct;
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struct device *pdev;
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u8 line, irq;
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u8 slot, line, irq;
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/* Each slot may contain up to eight functions. */
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for (funct = 0; funct < 8; funct++) {
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pdev = dev_find_slot(bus, (slot << 3) + funct);
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/* Each device may contain up to eight functions. */
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slot = dev->path.pci.devfn >> 3;
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if (!pdev)
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continue;
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for (; dev ; dev = dev->sibling) {
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line = pci_read_config8(pdev, PCI_INTERRUPT_PIN);
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if (dev->path.pci.devfn >> 3 != slot)
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break;
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line = pci_read_config8(dev, PCI_INTERRUPT_PIN);
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/* PCI spec says all values except 1..4 are reserved. */
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if ((line < 1) || (line > 4))
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@ -1527,11 +1524,9 @@ void pci_assign_irqs(unsigned bus, unsigned slot,
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irq = pIntAtoD[line - 1];
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printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n",
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irq, bus, slot, funct);
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printk(BIOS_DEBUG, "Assigning IRQ %d to %s\n", irq, dev_path(dev));
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pci_write_config8(pdev, PCI_INTERRUPT_LINE,
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pIntAtoD[line - 1]);
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pci_write_config8(dev, PCI_INTERRUPT_LINE, pIntAtoD[line - 1]);
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#ifdef PARANOID_IRQ_ASSIGNMENTS
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irq = pci_read_config8(pdev, PCI_INTERRUPT_LINE);
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@ -98,8 +98,7 @@ unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev);
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const char *pin_to_str(int pin);
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int get_pci_irq_pins(struct device *dev, struct device **parent_bdg);
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void pci_assign_irqs(unsigned int bus, unsigned int slot,
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const unsigned char pIntAtoD[4]);
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void pci_assign_irqs(struct device *dev, const unsigned char pIntAtoD[4]);
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const char *get_pci_class_name(struct device *dev);
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const char *get_pci_subclass_name(struct device *dev);
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@ -41,7 +41,7 @@ static void qemu_nb_init(struct device *dev)
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/* setup IRQ routing */
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for (i = 0; i < 32; i++)
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pci_assign_irqs(0, i, qemu_i440fx_irqs + (i % 4));
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pci_assign_irqs(pcidev_on_root(i, 0), qemu_i440fx_irqs + (i % 4));
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}
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static struct device_operations nb_operations = {
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@ -61,10 +61,10 @@ static void qemu_nb_init(struct device *dev)
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/* setup IRQ routing for pci slots */
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for (i = 0; i < 25; i++)
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pci_assign_irqs(0, i, qemu_q35_irqs + (i % 4));
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pci_assign_irqs(pcidev_on_root(i, 0), qemu_q35_irqs + (i % 4));
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/* setup IRQ routing southbridge devices */
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for (i = 25; i < 32; i++)
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pci_assign_irqs(0, i, qemu_q35_irqs);
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pci_assign_irqs(pcidev_on_root(i, 0), qemu_q35_irqs);
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}
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static void qemu_nb_read_resources(struct device *dev)
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