mb/intel/icelake_rvp/../icl_y: Enable SaGv

This patch enables SaGv on Intel ICL-Y RVP board.

TEST=Able to build and boot to Chrome OS.

Change-Id: Ic3ed94d47ddc7fd70bf3de1db15fe574029df856
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/31119
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Subrata Banik 2019-01-28 12:11:06 +05:30
parent e990577d05
commit c1bf8ccdbc
1 changed files with 1 additions and 1 deletions

View File

@ -13,7 +13,7 @@ chip soc/intel/icelake
register "gpe0_dw2" = "GPP_E" register "gpe0_dw2" = "GPP_E"
# FSP configuration # FSP configuration
register "SaGv" = "SaGv_Disabled" register "SaGv" = "SaGv_Enabled"
register "SmbusEnable" = "1" register "SmbusEnable" = "1"
register "ScsEmmcHs400Enabled" = "1" register "ScsEmmcHs400Enabled" = "1"
register "SdCardPowerEnableActiveHigh" = "1" register "SdCardPowerEnableActiveHigh" = "1"