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mb/google/poppy/variants/nocturne: enable eist 

Enable Enhanced Intel SpeedStep (EIST) on nocturne.

Change-Id: Ie9b832f5bc3a5ef300783bd9bcd7cf5d186b98fa
Signed-off-by: Matt Delco <delco@chromium.org>
Reviewed-on: https://review.coreboot.org/28103
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Matt Delco 2018-08-15 11:55:26 -07:00 committed by Patrick Georgi
parent 1950ed9ee3
commit c1cb6da816
1 changed files with 2 additions and 0 deletions
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src/mainboard/google/poppy/variants/nocturne/devicetree.cb
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@ -7,6 +7,8 @@ chip soc/intel/skylake
register "deep_s5_enable_dc" = "1"
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
register "eist_enable" = "1"
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE