vendorcode/amd/pi/00670F00/Lib/AmdLib.c: Remove VENDORCODE_FULL_SUPPORT
Remove VENDORCODE_FULL_SUPPORT from file above mentioned file, in preparation to full removal of VENDORCODE_FULL_SUPPORT functions. BUG=b:112578491 TEST=none, VENDORCODE_FULL_SUPPORT already not used. Change-Id: Ic23dcf245b2cee24f7363ca3bb9918eb2f11179c Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/28091 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Richard Spiegel
Martin Roth
parent
1d0de7874d
commit
c1cefba150
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@ -61,18 +61,6 @@ GetPciMmioAddress (
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IN AMD_CONFIG_PARAMS *StdHeader
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);
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#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
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VOID
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STATIC
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LibAmdGetDataFromPtr (
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IN ACCESS_WIDTH AccessWidth,
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IN CONST VOID *Data,
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IN CONST VOID *DataMask,
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OUT UINT32 *TemData,
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OUT UINT32 *TempDataMask
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);
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#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
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VOID
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IdsOutPort (
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IN UINT32 Addr,
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@ -277,123 +265,6 @@ Write64Mem32 (
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}
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}
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#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
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AMDLIB_OPTIMIZE
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VOID
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LibAmdReadCpuReg (
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IN UINT8 RegNum,
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OUT UINT32 *Value
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)
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{
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*Value = 0;
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switch (RegNum){
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case CR4_REG:
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*Value = __readcr4 ();
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break;
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case DR0_REG:
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*Value = __readdr (0);
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break;
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case DR1_REG:
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*Value = __readdr (1);
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break;
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case DR2_REG:
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*Value = __readdr (2);
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break;
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case DR3_REG:
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*Value = __readdr (3);
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break;
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case DR7_REG:
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*Value = __readdr (7);
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break;
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default:
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*Value = -1;
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break;
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}
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}
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AMDLIB_OPTIMIZE
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VOID
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LibAmdWriteCpuReg (
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IN UINT8 RegNum,
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IN UINT32 Value
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)
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{
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switch (RegNum){
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case CR4_REG:
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__writecr4 (Value);
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break;
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case DR0_REG:
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__writedr (0, Value);
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break;
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case DR1_REG:
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__writedr (1, Value);
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break;
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case DR2_REG:
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__writedr (2, Value);
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break;
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case DR3_REG:
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__writedr (3, Value);
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break;
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case DR7_REG:
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__writedr (7, Value);
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break;
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default:
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break;
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}
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}
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AMDLIB_OPTIMIZE
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VOID
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LibAmdWriteBackInvalidateCache (
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void
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)
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{
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__wbinvd ();
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}
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AMDLIB_OPTIMIZE
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VOID
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LibAmdHDTBreakPoint (
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void
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)
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{
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__writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
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__debugbreak (); // do you really need icebp? If so, go back to asm code
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}
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AMDLIB_OPTIMIZE
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UINT8
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LibAmdBitScanForward (
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IN UINT32 value
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)
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{
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UINTN Index;
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for (Index = 0; Index < 32; Index++){
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if (value & (1 << Index)) break;
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}
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return (UINT8) Index;
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}
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AMDLIB_OPTIMIZE
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UINT8
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LibAmdBitScanReverse (
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IN UINT32 value
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)
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{
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uint8_t bit = 31;
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do {
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if (value & (1 << 31))
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return bit;
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value <<= 1;
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bit--;
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} while (value != 0);
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return 0xFF; /* Error code indicating no bit found */
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}
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#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
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AMDLIB_OPTIMIZE
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VOID
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LibAmdMsrRead (
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@ -419,93 +290,6 @@ LibAmdMsrWrite (
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__writemsr (MsrAddress, *Value);
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}
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#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
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AMDLIB_OPTIMIZE
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void LibAmdCpuidRead (
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IN UINT32 CpuidFcnAddress,
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OUT CPUID_DATA* Value,
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IN OUT AMD_CONFIG_PARAMS *ConfigPtr
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)
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{
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__cpuid ((int *)Value, CpuidFcnAddress);
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}
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AMDLIB_OPTIMIZE
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UINT64
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ReadTSC (
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void
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)
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{
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return __rdtsc ();
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}
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AMDLIB_OPTIMIZE
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VOID
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LibAmdSimNowEnterDebugger (
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void
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)
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{
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STATIC CONST UINT8 opcode [] = {0x60, // pushad
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0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2
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0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B
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0x0F, 0xA2, // cpuid
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0x61, // popad
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0xC3 // ret
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};
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((VOID (*)(VOID)) (size_t) opcode) (); // call the function
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}
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AMDLIB_OPTIMIZE
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VOID
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IdsOutPort (
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IN UINT32 Addr,
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IN UINT32 Value,
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IN UINT32 Flag
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)
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{
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__outdword ((UINT16) Addr, Value);
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}
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AMDLIB_OPTIMIZE
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VOID
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StopHere (
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void
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)
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{
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VOLATILE UINTN x = 1;
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while (x);
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}
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AMDLIB_OPTIMIZE
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VOID
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LibAmdCLFlush (
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IN UINT64 Address,
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IN UINT8 Count
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)
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{
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UINT64 hwcrSave;
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UINT8 *address32;
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UINTN Index;
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address32 = 0;
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hwcrSave = SetFsBase (Address);
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for (Index = 0; Index < Count; Index++){
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_mm_mfence ();
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_mm_clflush_fs (&address32 [Index * 64]);
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}
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RestoreHwcr (hwcrSave);
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}
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AMDLIB_OPTIMIZE
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VOID
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LibAmdFinit(
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void
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)
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{
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/* TODO: finit */
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__asm__ volatile ("finit");
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}
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#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
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/*---------------------------------------------------------------------------------------*/
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/**
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* Read IO port
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@ -582,41 +366,6 @@ LibAmdIoWrite (
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}
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}
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#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
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/*---------------------------------------------------------------------------------------*/
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/**
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* Poll IO register
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*
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* Poll register until (RegisterValue & DataMask) == Data
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*
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* @param[in] AccessWidth Access width
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* @param[in] IoAddress IO address
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* @param[in] Data Data to compare
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* @param[in] DataMask And mask
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* @param[in] Delay Poll for time in 100ns (not supported)
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* @param[in] StdHeader Standard configuration header
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*
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*/
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VOID
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LibAmdIoPoll (
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IN ACCESS_WIDTH AccessWidth,
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IN UINT16 IoAddress,
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IN CONST VOID *Data,
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IN CONST VOID *DataMask,
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IN UINT64 Delay,
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IN OUT AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT32 TempData;
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UINT32 TempMask;
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UINT32 Value;
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LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
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do {
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LibAmdIoRead (AccessWidth, IoAddress, &Value, NULL);
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} while (TempData != (Value & TempMask));
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}
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#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
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/*---------------------------------------------------------------------------------------*/
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/**
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* Read memory/MMIO
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@ -694,41 +443,6 @@ LibAmdMemWrite (
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}
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}
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#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
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/*---------------------------------------------------------------------------------------*/
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/**
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* Poll Mmio
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*
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* Poll register until (RegisterValue & DataMask) == Data
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*
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* @param[in] AccessWidth Access width
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* @param[in] MemAddress Memory address
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* @param[in] Data Data to compare
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* @param[in] DataMask AND mask
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* @param[in] Delay Poll for time in 100ns (not supported)
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* @param[in] StdHeader Standard configuration header
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*
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*/
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VOID
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LibAmdMemPoll (
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IN ACCESS_WIDTH AccessWidth,
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IN UINT64 MemAddress,
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IN CONST VOID *Data,
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IN CONST VOID *DataMask,
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IN UINT64 Delay,
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IN OUT AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT32 TempData = 0;
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UINT32 TempMask = 0;
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UINT32 Value;
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LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
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do {
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LibAmdMemRead (AccessWidth, MemAddress, &Value, NULL);
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} while (TempData != (Value & TempMask));
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}
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#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
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/*---------------------------------------------------------------------------------------*/
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/**
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* Read PCI config space
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@ -835,41 +549,6 @@ LibAmdPciWrite (
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}
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}
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#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
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/*---------------------------------------------------------------------------------------*/
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/**
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* Poll PCI config space register
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*
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* Poll register until (RegisterValue & DataMask) == Data
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*
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* @param[in] AccessWidth Access width
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* @param[in] PciAddress Pci address
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* @param[in] Data Data to compare
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* @param[in] DataMask AND mask
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* @param[in] Delay Poll for time in 100ns (not supported)
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* @param[in] StdHeader Standard configuration header
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*
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*/
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VOID
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LibAmdPciPoll (
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IN ACCESS_WIDTH AccessWidth,
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IN PCI_ADDR PciAddress,
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IN CONST VOID *Data,
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IN CONST VOID *DataMask,
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IN UINT64 Delay,
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IN OUT AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT32 TempData = 0;
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UINT32 TempMask = 0;
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UINT32 Value;
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LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
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do {
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LibAmdPciRead (AccessWidth, PciAddress, &Value, NULL);
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} while (TempData != (Value & TempMask));
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}
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#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
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/*---------------------------------------------------------------------------------------*/
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/**
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* Get MMIO base address for PCI accesses
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@ -903,207 +582,6 @@ GetPciMmioAddress (
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return MmioIsEnabled;
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}
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#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
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/*---------------------------------------------------------------------------------------*/
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/**
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* Read field of PCI config register.
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*
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*
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*
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* @param[in] Address Pci address (register must be DWORD aligned)
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* @param[in] Highbit High bit position of the field in DWORD
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* @param[in] Lowbit Low bit position of the field in DWORD
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* @param[out] Value Pointer to data
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* @param[in] StdHeader Standard configuration header
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*/
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VOID
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LibAmdPciReadBits (
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IN PCI_ADDR Address,
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IN UINT8 Highbit,
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IN UINT8 Lowbit,
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OUT UINT32 *Value,
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IN AMD_CONFIG_PARAMS *StdHeader
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)
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{
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ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
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LibAmdPciRead (AccessWidth32, Address, Value, NULL);
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*Value >>= Lowbit; // Shift
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// A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
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if ((Highbit - Lowbit) != 31) {
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*Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
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}
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}
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/*---------------------------------------------------------------------------------------*/
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/**
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* Write field of PCI config register.
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*
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*
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*
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* @param[in] Address Pci address (register must be DWORD aligned)
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* @param[in] Highbit High bit position of the field in DWORD
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* @param[in] Lowbit Low bit position of the field in DWORD
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* @param[in] Value Pointer to data
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* @param[in] StdHeader Standard configuration header
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*/
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VOID
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LibAmdPciWriteBits (
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IN PCI_ADDR Address,
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IN UINT8 Highbit,
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IN UINT8 Lowbit,
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IN CONST UINT32 *Value,
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IN AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT32 Temp;
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UINT32 Mask;
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ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
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// A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
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if ((Highbit - Lowbit) != 31) {
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Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
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} else {
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Mask = (UINT32) 0xFFFFFFFF;
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}
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LibAmdPciRead (AccessWidth32, Address, &Temp, NULL);
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Temp &= ~(Mask << Lowbit);
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Temp |= (*Value & Mask) << Lowbit;
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LibAmdPciWrite (AccessWidth32, Address, &Temp, NULL);
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}
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/*---------------------------------------------------------------------------------------*/
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/**
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* Locate next capability pointer
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*
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* Given a SBDFO this routine will find the next PCI capabilities list entry.
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* if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
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* returned.
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* To start a new search from the head of the list, specify a SBDFO with an offset of zero.
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*
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* @param[in,out] Address Pci address
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* @param[in] StdHeader Standard configuration header
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*/
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VOID
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LibAmdPciFindNextCap (
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IN OUT PCI_ADDR *Address,
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IN AMD_CONFIG_PARAMS *StdHeader
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)
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{
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PCI_ADDR Base;
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UINT32 Offset;
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UINT32 Temp;
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PCI_ADDR TempAddress;
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ASSERT (Address != NULL);
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ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
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Base.AddressValue = Address->AddressValue;
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Offset = Base.Address.Register;
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Base.Address.Register = 0;
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Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
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// Verify that the SBDFO points to a valid PCI device SANITY CHECK
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LibAmdPciRead (AccessWidth32, Base, &Temp, NULL);
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if (Temp == 0xFFFFFFFF) {
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ASSERT (FALSE);
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return; // There is no device at this address
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}
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// Verify that the device supports a capability list
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TempAddress.AddressValue = Base.AddressValue + 0x04;
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LibAmdPciReadBits (TempAddress, 20, 20, &Temp, NULL);
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if (Temp == 0) {
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return; // This PCI device does not support capability lists
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}
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if (Offset != 0) {
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// If we are continuing on an existing list
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TempAddress.AddressValue = Base.AddressValue + Offset;
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LibAmdPciReadBits (TempAddress, 15, 8, &Temp, NULL);
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} else {
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// We are starting on a new list
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TempAddress.AddressValue = Base.AddressValue + 0x34;
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LibAmdPciReadBits (TempAddress, 7, 0, &Temp, NULL);
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}
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if (Temp == 0) {
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return; // We have reached the end of the capabilities list
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}
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// Error detection and recovery- The statement below protects against
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// PCI devices with broken PCI capabilities lists. Detect a pointer
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// that is not uint32 aligned, points into the first 64 reserved DWORDs
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// or points back to itself.
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if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
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ASSERT (FALSE);
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return;
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}
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Address->AddressValue = Base.AddressValue + Temp;
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return;
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}
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/*---------------------------------------------------------------------------------------*/
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/**
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* Set memory with value
|
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*
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*
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* @param[in,out] Destination Pointer to memory range
|
||||
* @param[in] Value Value to set memory with
|
||||
* @param[in] FillLength Size of the memory range
|
||||
* @param[in] StdHeader Standard configuration header (Optional)
|
||||
*/
|
||||
VOID
|
||||
LibAmdMemFill (
|
||||
IN VOID *Destination,
|
||||
IN UINT8 Value,
|
||||
IN UINTN FillLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
)
|
||||
{
|
||||
UINT8 *Dest;
|
||||
Dest = Destination;
|
||||
while ((FillLength--) != 0) {
|
||||
*Dest++ = Value;
|
||||
}
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
* Copy memory
|
||||
*
|
||||
*
|
||||
* @param[in,out] Destination Pointer to destination buffer
|
||||
* @param[in] Source Pointer to source buffer
|
||||
* @param[in] CopyLength buffer length
|
||||
* @param[in] StdHeader Standard configuration header (Optional)
|
||||
*/
|
||||
VOID
|
||||
LibAmdMemCopy (
|
||||
IN VOID *Destination,
|
||||
IN CONST VOID *Source,
|
||||
IN UINTN CopyLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
)
|
||||
{
|
||||
UINT8 *Dest;
|
||||
CONST UINT8 *SourcePtr;
|
||||
Dest = Destination;
|
||||
SourcePtr = Source;
|
||||
while ((CopyLength--) != 0) {
|
||||
*Dest++ = *SourcePtr++;
|
||||
}
|
||||
}
|
||||
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
|
||||
|
||||
/*---------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
* Verify checksum of binary image (B1/B2/B3)
|
||||
|
|
@ -1187,138 +665,6 @@ LibAmdLocateImage (
|
|||
return NULL;
|
||||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
|
||||
/*---------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
* Returns the package type mask for the processor
|
||||
*
|
||||
*
|
||||
* @param[in] StdHeader Standard configuration header (Optional)
|
||||
*/
|
||||
|
||||
// Returns the package type mask for the processor
|
||||
UINT32
|
||||
LibAmdGetPackageType (
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
)
|
||||
{
|
||||
UINT32 ProcessorPackageType;
|
||||
CPUID_DATA CpuId;
|
||||
|
||||
LibAmdCpuidRead (0x80000001, &CpuId, NULL);
|
||||
ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
|
||||
return (UINT32) (1 << ProcessorPackageType);
|
||||
}
|
||||
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
|
||||
|
||||
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
|
||||
/*---------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
* Returns the package type mask for the processor
|
||||
*
|
||||
*
|
||||
* @param[in] AccessWidth Access width
|
||||
* @param[in] Data data
|
||||
* @param[in] DataMask data
|
||||
* @param[out] TemData typecast data
|
||||
* @param[out] TempDataMask typecast data
|
||||
*/
|
||||
|
||||
VOID
|
||||
STATIC
|
||||
LibAmdGetDataFromPtr (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
OUT UINT32 *TemData,
|
||||
OUT UINT32 *TempDataMask
|
||||
)
|
||||
{
|
||||
switch (AccessWidth) {
|
||||
case AccessWidth8:
|
||||
case AccessS3SaveWidth8:
|
||||
*TemData = (UINT32)*(UINT8 *) Data;
|
||||
*TempDataMask = (UINT32)*(UINT8 *) DataMask;
|
||||
break;
|
||||
case AccessWidth16:
|
||||
case AccessS3SaveWidth16:
|
||||
*TemData = (UINT32)*(UINT16 *) Data;
|
||||
*TempDataMask = (UINT32)*(UINT16 *) DataMask;
|
||||
break;
|
||||
case AccessWidth32:
|
||||
case AccessS3SaveWidth32:
|
||||
*TemData = *(UINT32 *) Data;
|
||||
*TempDataMask = *(UINT32 *) DataMask;
|
||||
break;
|
||||
default:
|
||||
IDS_ERROR_TRAP;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
* Returns the package type mask for the processor
|
||||
*
|
||||
*
|
||||
* @param[in] AccessWidth Access width
|
||||
* @retval Width in number of bytes
|
||||
*/
|
||||
|
||||
UINT8
|
||||
LibAmdAccessWidth (
|
||||
IN ACCESS_WIDTH AccessWidth
|
||||
)
|
||||
{
|
||||
UINT8 Width;
|
||||
|
||||
switch (AccessWidth) {
|
||||
case AccessWidth8:
|
||||
case AccessS3SaveWidth8:
|
||||
Width = 1;
|
||||
break;
|
||||
case AccessWidth16:
|
||||
case AccessS3SaveWidth16:
|
||||
Width = 2;
|
||||
break;
|
||||
case AccessWidth32:
|
||||
case AccessS3SaveWidth32:
|
||||
Width = 4;
|
||||
break;
|
||||
case AccessWidth64:
|
||||
case AccessS3SaveWidth64:
|
||||
Width = 8;
|
||||
break;
|
||||
default:
|
||||
Width = 0;
|
||||
IDS_ERROR_TRAP;
|
||||
break;
|
||||
}
|
||||
return Width;
|
||||
}
|
||||
|
||||
AMDLIB_OPTIMIZE
|
||||
VOID
|
||||
CpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value
|
||||
)
|
||||
{
|
||||
__cpuid ((int *)Value, CpuidFcnAddress);
|
||||
}
|
||||
|
||||
AMDLIB_OPTIMIZE
|
||||
UINT8
|
||||
ReadNumberOfCpuCores(
|
||||
void
|
||||
)
|
||||
{
|
||||
CPUID_DATA Value;
|
||||
CpuidRead (0x80000008, &Value);
|
||||
return Value.ECX_Reg & 0xff;
|
||||
}
|
||||
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
|
||||
|
||||
BOOLEAN
|
||||
IdsErrorStop (
|
||||
IN UINT32 FileCode
|
||||
|
|
|
|||
Loading…
Reference in New Issue