mb/supermicro/x11-lga1151-series: rework gpio setup to not use headers
Rework gpio setup for the board series to not use headers but stage-specific compilation units. Tested successfully on X11SSM-F. Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Change-Id: Ic62ce4335af605c081ef288e892441585ff2bd3e Reviewed-on: https://review.coreboot.org/c/coreboot/+/48087 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
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e88dacfa43
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c1d1dddbcc
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@ -1,10 +1,11 @@
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## SPDX-License-Identifier: GPL-2.0-only
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bootblock-y += bootblock.c
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ramstage-y += mainboard.c
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
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bootblock-y += bootblock.c
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bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c
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ramstage-y += mainboard.c
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ramstage-y += variants/$(VARIANT_DIR)/gpio.c
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subdirs-y += variants/$(VARIANT_DIR)
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
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@ -1,20 +1,11 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bootblock_common.h>
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#include <soc/gpio.h>
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#include <variant/gpio.h>
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#include <mainboard/gpio.h>
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#include <superio/aspeed/common/aspeed.h>
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#include <superio/aspeed/ast2400/ast2400.h>
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#include <console/uart.h>
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static void early_config_gpio(void)
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{
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/* This is a hack for FSP because it does things in MemoryInit()
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* which it shouldn't do. We have to prepare certain gpios here
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* because of the brokenness in FSP. */
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gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
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}
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static void early_config_superio(void)
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{
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const pnp_devfn_t serial_dev = PNP_DEV(0x2e, AST2400_SUART1);
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@ -23,6 +14,6 @@ static void early_config_superio(void)
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void bootblock_mainboard_early_init(void)
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{
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early_config_gpio();
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mainboard_configure_early_gpios();
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early_config_superio();
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}
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@ -0,0 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef MAINBOARD_GPIO_H
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#define MAINBOARD_GPIO_H
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void mainboard_configure_early_gpios(void);
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void mainboard_configure_gpios(void);
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#endif
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@ -2,8 +2,7 @@
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#include <mainboard.h>
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#include <device/device.h>
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#include <soc/ramstage.h>
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#include <variant/gpio.h>
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#include <mainboard/gpio.h>
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__weak void variant_mainboard_init(void *chip_info)
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{
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@ -12,7 +11,7 @@ __weak void variant_mainboard_init(void *chip_info)
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static void mainboard_chip_init(void *chip_info)
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{
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/* do common init */
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gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
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mainboard_configure_gpios();
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/* do variant init */
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variant_mainboard_init(chip_info);
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@ -1,8 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _GPIO_X11SSH_F_H
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#define _GPIO_X11SSH_F_H
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#include <mainboard/gpio.h>
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#include <soc/gpe.h>
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#include <soc/gpio.h>
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@ -226,17 +224,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_I10, NONE, DEEP, NF1),
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};
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static const struct pad_config early_gpio_table[] = {
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/* Early LPC configuration in romstage */
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PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
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};
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#endif /* _GPIO_X11SSH_F_H */
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void mainboard_configure_gpios(void)
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{
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gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
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}
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@ -0,0 +1,22 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <mainboard/gpio.h>
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#include <soc/gpio.h>
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static const struct pad_config early_gpio_table[] = {
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/* Early LPC configuration in romstage */
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PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
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};
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void mainboard_configure_early_gpios(void)
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{
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gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
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}
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@ -1,8 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _GPIO_X11SSH_TF_H
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#define _GPIO_X11SSH_TF_H
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#include <mainboard/gpio.h>
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#include <soc/gpe.h>
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#include <soc/gpio.h>
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@ -226,17 +224,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_I10, NONE, DEEP, NF1),
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};
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static const struct pad_config early_gpio_table[] = {
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/* Early LPC configuration in romstage */
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PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
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};
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#endif /* _GPIO_X11SSH_TF_H */
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void mainboard_configure_gpios(void)
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{
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gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
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}
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@ -0,0 +1,22 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <mainboard/gpio.h>
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#include <soc/gpio.h>
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static const struct pad_config early_gpio_table[] = {
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/* Early LPC configuration in romstage */
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PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
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};
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void mainboard_configure_early_gpios(void)
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{
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gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
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}
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@ -1,8 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _GPIO_X11SSM_F_H
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#define _GPIO_X11SSM_F_H
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#include <mainboard/gpio.h>
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#include <soc/gpe.h>
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#include <soc/gpio.h>
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PAD_NC(GPD11, NONE),
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};
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static const struct pad_config early_gpio_table[] = {
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/* Early LPC configuration in romstage */
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PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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};
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#endif /* _GPIO_X11SSM_F_H */
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void mainboard_configure_gpios(void)
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{
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gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
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}
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@ -0,0 +1,22 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <mainboard/gpio.h>
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#include <soc/gpio.h>
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static const struct pad_config early_gpio_table[] = {
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/* Early LPC configuration in romstage */
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PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
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};
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void mainboard_configure_early_gpios(void)
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{
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gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
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}
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