sb/intel/common: Change some SMI logging

Change-Id: Ief0c3d36e6de6e18b7f2613f043ac4d31a193f9d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49249
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2021-01-08 16:41:02 +02:00
parent 9a1620f4ed
commit c1d524b8c6
4 changed files with 2 additions and 20 deletions

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@ -6,11 +6,6 @@
#include <cpu/x86/smm.h>
#include <superio/smsc/sch5545/sch5545.h>
void mainboard_smi_gpi(u32 gpi_sts)
{
printk(BIOS_SPEW, "%s: gpi_sts: %08x\n", __func__, gpi_sts);
}
int mainboard_smi_apmc(u8 data)
{
u8 val;
@ -38,8 +33,3 @@ int mainboard_smi_apmc(u8 data)
}
return 0;
}
void mainboard_smi_sleep(u8 slp_typ)
{
printk(BIOS_SPEW, "%s: SMI sleep: %02x\n", __func__, slp_typ);
}

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@ -13,15 +13,8 @@
#include <ec/quanta/ene_kb3940q/ec.h>
#include "ec.h"
void mainboard_smi_gpi(u32 gpi_sts)
{
printk(BIOS_DEBUG, "warn: unknown mainboard_smi_gpi: %x\n", gpi_sts);
}
void mainboard_smi_sleep(u8 slp_typ)
{
printk(BIOS_DEBUG, "mainboard_smi_sleep: %x\n", slp_typ);
/* Tell the EC to Enable USB power for S3 if requested */
if (gnvs->s3u0 != 0 || gnvs->s3u1 != 0)
ec_mem_write(EC_EC_PSW, ec_mem_read(EC_EC_PSW) | EC_PSW_USB);

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@ -36,7 +36,6 @@ static u8 mainboard_smi_ec(void)
void mainboard_smi_gpi(u32 gpi_sts)
{
printk(BIOS_DEBUG, "%s: %x\n", __func__, gpi_sts);
if (gpi_sts & (1 << EC_SMI_GPI)) {
/* Process all pending events from EC */
do {} while (mainboard_smi_ec() != EC_NO_EVENT);
@ -50,7 +49,6 @@ void mainboard_smi_gpi(u32 gpi_sts)
void mainboard_smi_sleep(u8 slp_typ)
{
printk(BIOS_DEBUG, "%s: %x\n", __func__, slp_typ);
/* Disable SCI and SMI events */
/* Clear pending events that may trigger immediate wake */

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@ -113,9 +113,10 @@ static void southbridge_smi_sleep(void)
/* Figure out SLP_TYP */
reg32 = read_pmbase32(PM1_CNT);
printk(BIOS_SPEW, "SMI#: SLP = 0x%08x\n", reg32);
slp_typ = acpi_sleep_from_pm1(reg32);
printk(BIOS_SPEW, "SMI#: SLP = 0x%08x, TYPE = 0x%02x\n", reg32, slp_typ);
southbridge_smm_xhci_sleep(slp_typ);
/* Do any mainboard sleep handling */