diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index 92d0f9e358..297188bfe4 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -15,6 +15,7 @@
  * GNU General Public License for more details.
  */
 
+#include <bootstate.h>
 #include <chip.h>
 #include <console/console.h>
 #include <device/device.h>
@@ -204,4 +205,19 @@ void pmc_soc_restore_power_failure(void)
 		pmc_get_mainboard_power_failure_state_choice());
 }
 
+static void pm1_enable_pwrbtn_smi(void *unused)
+{
+	/*
+	 * Enable power button SMI only before jumping to payload. This ensures
+	 * that:
+	 * 1. Power button SMI is enabled only after coreboot is done.
+	 * 2. On resume path, power button SMI is not enabled and thus avoids
+	 * any shutdowns because of power button presses due to power button
+	 * press in resume path.
+	 */
+	pmc_update_pm1_enable(PWRBTN_EN);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL);
+
 #endif
diff --git a/src/soc/intel/skylake/smi.c b/src/soc/intel/skylake/smi.c
index f11a9d8c26..67c3bb8e48 100644
--- a/src/soc/intel/skylake/smi.c
+++ b/src/soc/intel/skylake/smi.c
@@ -90,18 +90,3 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
 		  "d" (APM_CNT)
 	);
 }
-
-static void pm1_enable_pwrbtn_smi(void *unused)
-{
-	/*
-	 * Enable power button SMI only before jumping to payload. This ensures
-	 * that:
-	 * 1. Power button SMI is enabled only after coreboot is done.
-	 * 2. On resume path, power button SMI is not enabled and thus avoids
-	 * any shutdowns because of power button presses due to power button
-	 * press in resume path.
-	 */
-	pmc_update_pm1_enable(PWRBTN_EN);
-}
-
-BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL);