src/mainboard/emulation/qemu-power9/*: add QEMU POWER9 mainboard
Add initial implementation for booting on QEMU POWER9 emulation. Change-Id: I079c5b9ad564024dd13296ef75c263bdc40c9d39 Signed-off-by: Yaroslav Kurlaev <yaroslav.kurlaev@3mdeb.com> Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57079 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
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# QEMU PPC64 emulator
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This page describes how to build and run coreboot for QEMU/PPC64.
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You can configure ELF payload via `make menuconfig` (make sure "ROM chip size"
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is large enough).
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## Running coreboot in QEMU
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```bash
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qemu-system-ppc64 -M powernv,hb-mode=on \
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-cpu power9 \
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-bios build/coreboot.rom \
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-drive file=build/coreboot.rom,if=mtd \
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-serial stdio \
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-display none
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```
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- The default CPU in QEMU for AArch64 is a 604. You specify a suitable
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PowerPC CPU via `-cpu power9`.
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- By default Hostboot mode is off and it needs to be turned on to run coreboot
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as a firmware rather than like an OS.
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- `-bios` specifies initial program (bootloader should suffice, but whole image
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works fine too).
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- `-drive` specifies image for emulated flash device.
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## Building coreboot
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```bash
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make defconfig KBUILD_DEFCONFIG=configs/config.emulation_qemu_power9
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make
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```
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This builds coreboot with no payload.
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CONFIG_BOARD_EMULATION_QEMU_POWER9=y
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## SPDX-License-Identifier: GPL-2.0-only
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# To execute, do:
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# qemu-system-ppc64 -M powernv --cpu power9 --bios 'build/coreboot.rom'
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if BOARD_EMULATION_QEMU_POWER9
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select CPU_POWER9
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select BOARD_ROMSIZE_KB_512
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select ARCH_BOOTBLOCK_PPC64
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select ARCH_VERSTAGE_PPC64
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select ARCH_ROMSTAGE_PPC64
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select ARCH_RAMSTAGE_PPC64
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select BOOT_DEVICE_NOT_SPI_FLASH
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select MISSING_BOARD_RESET
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config MEMLAYOUT_LD_FILE
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string
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default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/memlayout.ld"
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config MAINBOARD_DIR
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string
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default "emulation/qemu-power9"
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config MAINBOARD_PART_NUMBER
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string
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default "QEMU POWER9"
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config MAX_CPUS
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int
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default 1
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config MAINBOARD_VENDOR
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string
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default "Emulation"
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config DRAM_SIZE_MB
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int
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default 32768
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endif # BOARD_EMULATION_QEMU_POWER9
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config BOARD_EMULATION_QEMU_POWER9
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bool "QEMU power9"
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## SPDX-License-Identifier: GPL-2.0-only
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romstage-y += cbmem.c
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romstage-y += romstage.c
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Board name: QEMU POWER9
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Category: emulation
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <cbmem.h>
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void *cbmem_top_chipset(void)
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{
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/* Top of cbmem is at lowest usable DRAM address below 4GiB. */
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/* For now, last 1M of 4G */
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void *ptr = (void *) (4ULL * GiB - 1 * MiB);
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return ptr;
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}
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## SPDX-License-Identifier: GPL-2.0-only
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chip cpu/power9
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device cpu_cluster 0 on end
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end
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/device.h>
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#include <cbmem.h>
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static void mainboard_enable(struct device *dev)
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{
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if (!dev)
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die("No dev0; die\n");
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <memlayout.h>
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#include <arch/header.ld>
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SECTIONS
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{
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DRAM_START(0x0)
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BOOTBLOCK(0, 32K)
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STACK(0x8000, 32K)
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PRERAM_CBMEM_CONSOLE(0x10000, 128K)
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FMAP_CACHE(0x30000, 4K)
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CBFS_MCACHE(0x31000, 8K)
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TIMESTAMP(0x33000, 4K)
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CBFS_CACHE(0x34000, 512K)
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ROMSTAGE(0x100000, 1M)
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RAMSTAGE(0x300000, 5M)
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}
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <program_loading.h>
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void main(void)
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{
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console_init();
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run_ramstage();
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}
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