arch/x86: Introduce DUMP_SMBIOS_TYPE17 config
DDR5 spd is not supported read by coreboot. But FSP can read it, so print the memory information from smbios type17 dimm information. TEST=check the coreboot log. memory Channel-0-DIMM-0 type is DDR5 memory part number is MTC8C1084S1SC56BG1 memory max speed is 5600 MT/s memory speed is 5200 MT/s memory size is 16384 MiB Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: I2b5ca1f4a59598531a6cba500672c2717f2a7b00 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75756 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -359,4 +359,8 @@ config ECFW_PTR_SIZE
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help
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Size of reserved space for EC firmware pointer
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config DUMP_SMBIOS_TYPE17
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bool "Dump part of SMBIOS type17 dimm information."
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depends on GENERATE_SMBIOS_TABLES
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endif
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@ -219,6 +219,65 @@ static void smbios_fill_dimm_serial_number(const struct dimm_info *dimm,
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t->serial_number = smbios_add_string(t->eos, serial);
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}
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static const char *memory_device_type(u8 code)
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{
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/* SMBIOS spec 3.6 7.18.2 */
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static const char * const type[] = {
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"Other",
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"Unknown",
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"DRAM",
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"EDRAM",
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"VRAM",
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"SRAM",
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"RAM",
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"ROM",
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"Flash",
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"EEPROM",
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"FEPROM",
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"EPROM",
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"CDRAM",
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"3DRAM",
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"SDRAM",
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"SGRAM",
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"RDRAM",
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"DDR",
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"DDR2",
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"DDR2 FB-DIMM",
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"Reserved",
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"Reserved",
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"Reserved",
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"DDR3",
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"FBD2",
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"DDR4", /* 0x1A */
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"LPDDR",
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"LPDDR2",
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"LPDDR3",
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"LPDDR4",
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"Logical non-volatile device",
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"HBM",
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"HBM2",
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"DDR5",
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"LPDDR5",
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"HBM3", /* 0x24 */
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};
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if (code >= MEMORY_TYPE_OTHER && code <= MEMORY_TYPE_HBM3)
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return type[code - 1];
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return "Unsupproted";
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}
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static void dump_smbios_type17(struct dimm_info *dimm)
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{
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printk(BIOS_INFO, "memory at Channel-%d-DIMM-%d", dimm->channel_num, dimm->dimm_num);
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printk(BIOS_INFO, " type is %s\n", memory_device_type(dimm->ddr_type));
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printk(BIOS_INFO, "memory part number is %s\n", dimm->module_part_number);
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if (dimm->max_speed_mts != 0)
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printk(BIOS_INFO, "memory max speed is %d MT/s\n", dimm->max_speed_mts);
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printk(BIOS_INFO, "memory speed is %d MT/s\n",
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dimm->configured_speed_mts ? : dimm->ddr_frequency);
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printk(BIOS_INFO, "memory size is %d MiB\n", dimm->dimm_size);
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}
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static int create_smbios_type17_for_dimm(struct dimm_info *dimm,
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unsigned long *current, int *handle,
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int type16_handle)
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@ -273,6 +332,9 @@ static int create_smbios_type17_for_dimm(struct dimm_info *dimm,
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t->phys_memory_array_handle = type16_handle;
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*handle += 1;
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if (CONFIG(DUMP_SMBIOS_TYPE17))
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dump_smbios_type17(dimm);
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return smbios_full_table_len(&t->header, t->eos);
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}
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