arch/x86: Drop spurious arch/stages.h includes

Change-Id: I3b9217a7d9a6d98a9c5e8b69fe64c260b537bb64
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/arch/x86/boot.c

@@ -13,7 +13,6 @@
 
 #include <commonlib/helpers.h>
 #include <console/console.h>
-#include <arch/stages.h>
 #include <program_loading.h>
 #include <ip_checksum.h>
 #include <string.h>

src/mainboard/amd/bettong/romstage.c

@@ -16,7 +16,6 @@
 #include <console/console.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/bist.h>

src/mainboard/amd/db-ft3b-lc/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <device/pnp_def.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>

src/mainboard/amd/lamar/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <device/pnp_def.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>

src/mainboard/amd/olivehill/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <device/pnp_def.h>
 #include <commonlib/loglevel.h>
 #include <northbridge/amd/agesa/state_machine.h>

src/mainboard/amd/olivehillplus/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <device/pnp_def.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>

src/mainboard/amd/thatcher/romstage.c

@@ -18,7 +18,6 @@
 #include <device/pci_def.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <device/pnp_def.h>
 #include <commonlib/loglevel.h>
 #include <northbridge/amd/agesa/state_machine.h>

src/mainboard/asrock/g41c-gs/romstage.c

@@ -26,7 +26,6 @@
 #include <superio/winbond/common/winbond.h>
 #include <superio/nuvoton/common/nuvoton.h>
 #include <lib.h>
-#include <arch/stages.h>
 #include <northbridge/intel/x4x/iomap.h>
 #include <device/pnp_def.h>
 #include <timestamp.h>

src/mainboard/asrock/imb-a180/romstage.c

@@ -18,7 +18,6 @@
 #include <device/pci_def.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <device/pnp_def.h>
 #include <commonlib/loglevel.h>
 

src/mainboard/asus/p5qpl-am/romstage.c

@@ -24,7 +24,6 @@
 #include <superio/winbond/w83627dhg/w83627dhg.h>
 #include <superio/winbond/common/winbond.h>
 #include <lib.h>
-#include <arch/stages.h>
 #include <northbridge/intel/x4x/iomap.h>
 #include <device/pnp_def.h>
 #include <timestamp.h>

src/mainboard/bap/ode_e21XX/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <device/pnp_def.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>

src/mainboard/biostar/a68n_5200/romstage.c

@@ -19,7 +19,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <device/pnp_def.h>
 #include <commonlib/loglevel.h>
 #include <northbridge/amd/agesa/state_machine.h>

src/mainboard/cubietech/cubieboard/romstage.c

@@ -23,7 +23,6 @@
  * faster.
  */
 
-#include <arch/stages.h>
 #include <console/console.h>
 #include <cpu/allwinner/a10/clock.h>
 #include <cpu/allwinner/a10/gpio.h>

src/mainboard/foxconn/d41s/romstage.c

@@ -31,7 +31,6 @@
 #include <superio/ite/common/ite.h>
 #include <superio/ite/it8721f/it8721f.h>
 #include <lib.h>
-#include <arch/stages.h>
 #include <cbmem.h>
 #include <romstage_handoff.h>
 #include <timestamp.h>

src/mainboard/gigabyte/ga-g41m-es2l/romstage.c

@@ -28,7 +28,6 @@
 #include <superio/ite/it8718f/it8718f.h>
 #include <superio/ite/common/ite.h>
 #include <lib.h>
-#include <arch/stages.h>
 #include <northbridge/intel/x4x/iomap.h>
 #include <timestamp.h>
 

src/mainboard/google/daisy/romstage.c

@@ -15,7 +15,6 @@
 
 #include <arch/cache.h>
 #include <arch/exception.h>
-#include <arch/stages.h>
 #include <armv7.h>
 #include <cbmem.h>
 #include <console/console.h>

src/mainboard/google/peach_pit/romstage.c

@@ -15,7 +15,6 @@
 
 #include <arch/cache.h>
 #include <arch/exception.h>
-#include <arch/stages.h>
 #include <armv7.h>
 #include <boot_device.h>
 #include <cbmem.h>

src/mainboard/google/veyron/romstage.c

@@ -15,7 +15,6 @@
 
 #include <arch/cache.h>
 #include <arch/exception.h>
-#include <arch/stages.h>
 #include <armv7.h>
 #include <assert.h>
 #include <cbmem.h>

src/mainboard/google/veyron_mickey/romstage.c

@@ -15,7 +15,6 @@
 
 #include <arch/cache.h>
 #include <arch/exception.h>
-#include <arch/stages.h>
 #include <armv7.h>
 #include <assert.h>
 #include <cbmem.h>

src/mainboard/google/veyron_rialto/romstage.c

@@ -16,7 +16,6 @@
 #include <arch/cache.h>
 #include <arch/exception.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <armv7.h>
 #include <assert.h>
 #include <cbmem.h>

src/mainboard/intel/bayleybay_fsp/romstage.c

@@ -17,7 +17,6 @@
 #include <stddef.h>
 #include <arch/io.h>
 #include <arch/cbfs.h>
-#include <arch/stages.h>
 #include <cpu/x86/mtrr.h>
 #include <romstage_handoff.h>
 #include <timestamp.h>

src/mainboard/intel/d510mo/romstage.c

@@ -30,7 +30,6 @@
 #include <superio/winbond/w83627thg/w83627thg.h>
 #include <superio/winbond/common/winbond.h>
 #include <lib.h>
-#include <arch/stages.h>
 #include <cbmem.h>
 #include <romstage_handoff.h>
 #include <timestamp.h>

src/mainboard/intel/dg41wv/romstage.c

@@ -24,7 +24,6 @@
 #include <superio/winbond/w83627dhg/w83627dhg.h>
 #include <superio/winbond/common/winbond.h>
 #include <lib.h>
-#include <arch/stages.h>
 #include <northbridge/intel/x4x/iomap.h>
 #include <device/pnp_def.h>
 #include <timestamp.h>

src/mainboard/lenovo/thinkcentre_a58/romstage.c

@@ -23,7 +23,6 @@
 #include <cpu/intel/romstage.h>
 #include <superio/smsc/smscsuperio/smscsuperio.h>
 #include <lib.h>
-#include <arch/stages.h>
 #include <northbridge/intel/x4x/iomap.h>
 #include <device/pnp_def.h>
 #include <timestamp.h>

src/mainboard/pcengines/apu2/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <arch/stages.h>
 #include <device/pnp.h>
 #include <device/pnp_def.h>
 #include <arch/cpu.h>

src/mainboard/siemens/mc_tcu3/romstage.c

@@ -17,7 +17,6 @@
 #include <stddef.h>
 #include <arch/io.h>
 #include <arch/cbfs.h>
-#include <arch/stages.h>
 #include <console/console.h>
 #include <cpu/x86/mtrr.h>
 #include <romstage_handoff.h>

src/soc/intel/braswell/romstage/romstage.c

@@ -20,7 +20,6 @@
 #include <arch/early_variables.h>
 #include <arch/io.h>
 #include <arch/cbfs.h>
-#include <arch/stages.h>
 #include <chip.h>
 #include <cpu/x86/mtrr.h>
 #include <console/console.h>

src/soc/intel/skylake/romstage/romstage.c

@@ -16,7 +16,6 @@
 
 #include <arch/io.h>
 #include <arch/cbfs.h>
-#include <arch/stages.h>
 #include <arch/early_variables.h>
 #include <assert.h>
 #include <chip.h>