arch/x86/ioapic: Select IOAPIC with SMP

For coreboot proper, I/O APIC programming is not really required,
except for the APIC ID field. We generally do not guard the related
set_ioapic_id() or setup_ioapic() calls with CONFIG(IOAPIC).
In practice it's something one cannot leave unselected, but maintain
the Kconfig for the time being.

Change-Id: I6e83efafcf6e81d1dfd433fab1e89024d984cc1f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55291
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

src/Kconfig

@@ -717,6 +717,7 @@ config PCI_IO_CFG_EXT
 
 config IOAPIC
 	bool
+	default y if SMP
 	default n
 
 config USE_WATCHDOG_ON_BOOT

src/mainboard/asus/p2b/Kconfig

@@ -6,7 +6,6 @@ config BASE_ASUS_P2B_D
 	def_bool n
 	select SDRAMPWR_4DIMM
 	select HAVE_MP_TABLE
-	select IOAPIC
 
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y

src/mainboard/emulation/qemu-i440fx/Kconfig

@@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS
 	select HAVE_ASAN_IN_ROMSTAGE
 	select NO_SMM
 	select BOOT_DEVICE_NOT_SPI_FLASH
-	select IOAPIC
 
 config VBOOT
 	select VBOOT_MUST_REQUEST_DISPLAY

src/soc/amd/cezanne/Kconfig

@@ -30,7 +30,6 @@ config SOC_SPECIFIC_OPTIONS
 	select HAVE_FSP_GOP
 	select HAVE_SMI_HANDLER
 	select IDT_IN_EVERY_STAGE
-	select IOAPIC
 	select PARALLEL_MP_AP_WORK
 	select PAYLOAD_PRELOAD
 	select PLATFORM_USES_FSP2_0

src/soc/amd/picasso/Kconfig

@@ -23,7 +23,6 @@ config CPU_SPECIFIC_OPTIONS
 	select DRIVERS_USB_PCI_XHCI
 	select GENERIC_GPIO_LIB
 	select IDT_IN_EVERY_STAGE
-	select IOAPIC
 	select HAVE_ACPI_TABLES
 	select HAVE_EM100_SUPPORT
 	select SOC_AMD_COMMON

src/soc/amd/stoneyridge/Kconfig

@@ -19,7 +19,6 @@ config CPU_SPECIFIC_OPTIONS
 	select HAVE_CF9_RESET
 	select HAVE_SMI_HANDLER
 	select HAVE_USBDEBUG_OPTIONS
-	select IOAPIC
 	select PARALLEL_MP_AP_WORK
 	select RTC
 	select SOC_AMD_PI

src/soc/intel/alderlake/Kconfig

@@ -34,7 +34,6 @@ config CPU_SPECIFIC_OPTIONS
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
 	select INTEL_GMA_OPREGION_2_1
-	select IOAPIC
 	select INTEL_TME
 	select MP_SERVICES_PPI_V2
 	select MRC_SETTINGS_PROTECT

src/soc/intel/apollolake/Kconfig

@@ -30,7 +30,6 @@ config CPU_SPECIFIC_OPTIONS
 	select CPU_INTEL_COMMON
 	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
-	select IOAPIC
 	select PCR_COMMON_IOSF_1_0
 	select SSE2
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/soc/intel/broadwell/pch/Kconfig

@@ -15,7 +15,6 @@ config PCH_SPECIFIC_OPTIONS
 	select HAVE_USBDEBUG
 	select INTEL_DESCRIPTOR_MODE_CAPABLE
 	select INTEL_LYNXPOINT_LP
-	select IOAPIC
 	select RTC
 	select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
 	select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS

src/soc/intel/cannonlake/Kconfig

@@ -67,7 +67,6 @@ config CPU_SPECIFIC_OPTIONS
 	select INTEL_DESCRIPTOR_MODE_CAPABLE
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
-	select IOAPIC
 	select MRC_SETTINGS_PROTECT
 	select PARALLEL_MP_AP_WORK
 	select PLATFORM_USES_FSP2_0

src/soc/intel/denverton_ns/Kconfig

@@ -20,7 +20,6 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON
 	select SOC_INTEL_COMMON_RESET
 	select PLATFORM_USES_FSP2_0
-	select IOAPIC
 	select HAVE_INTEL_FSP_REPO
 	select HAVE_SMI_HANDLER
 	select CACHE_MRC_SETTINGS

src/soc/intel/elkhartlake/Kconfig

@@ -25,7 +25,6 @@ config CPU_SPECIFIC_OPTIONS
 	select INTEL_CAR_NEM #TODO - Enable INTEL_CAR_NEM_ENHANCED
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
-	select IOAPIC
 	select MP_SERVICES_PPI_V1
 	select MRC_SETTINGS_PROTECT
 	select PARALLEL_MP_AP_WORK

src/soc/intel/icelake/Kconfig

@@ -25,7 +25,6 @@ config CPU_SPECIFIC_OPTIONS
 	select INTEL_CAR_NEM_ENHANCED
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
-	select IOAPIC
 	select MP_SERVICES_PPI_V1
 	select MRC_SETTINGS_PROTECT
 	select PARALLEL_MP_AP_WORK

src/soc/intel/jasperlake/Kconfig

@@ -26,7 +26,6 @@ config CPU_SPECIFIC_OPTIONS
 	select INTEL_CAR_NEM_ENHANCED
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
-	select IOAPIC
 	select MP_SERVICES_PPI_V1
 	select MRC_SETTINGS_PROTECT
 	select PARALLEL_MP_AP_WORK

src/soc/intel/skylake/Kconfig

@@ -41,7 +41,6 @@ config CPU_SPECIFIC_OPTIONS
 	select INTEL_DESCRIPTOR_MODE_CAPABLE
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
-	select IOAPIC
 	select MRC_SETTINGS_PROTECT
 	select PARALLEL_MP_AP_WORK
 	select PLATFORM_USES_FSP2_0

src/soc/intel/tigerlake/Kconfig

@@ -35,7 +35,6 @@ config CPU_SPECIFIC_OPTIONS
 	select SF_MASK_2WAYS_PER_BIT if INTEL_CAR_NEM_ENHANCED
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
-	select IOAPIC
 	select MP_SERVICES_PPI_V1
 	select MRC_SETTINGS_PROTECT
 	select PARALLEL_MP_AP_WORK

src/soc/intel/xeon_sp/Kconfig

@@ -35,7 +35,6 @@ config	CPU_SPECIFIC_OPTIONS
 	select FSP_T_XIP
 	select FSP_M_XIP
 	select POSTCAR_STAGE
-	select IOAPIC
 	select PARALLEL_MP_AP_WORK
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select INTEL_DESCRIPTOR_MODE_CAPABLE

src/southbridge/amd/agesa/hudson/Kconfig

@@ -10,7 +10,6 @@ if SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE
 
 config SOUTHBRIDGE_SPECIFIC_OPTIONS
 	def_bool y
-	select IOAPIC
 	select HAVE_USBDEBUG_OPTIONS
 	select HAVE_CF9_RESET
 	select HAVE_CF9_RESET_PREPARE

src/southbridge/amd/cimx/sb800/Kconfig

@@ -3,7 +3,6 @@
 config SOUTHBRIDGE_AMD_CIMX_SB800
 	bool
 	default n
-	select IOAPIC
 	select HAVE_USBDEBUG_OPTIONS
 	select AMD_SB_CIMX
 	select HAVE_CF9_RESET

src/southbridge/amd/pi/hudson/Kconfig

@@ -10,7 +10,6 @@ if SOUTHBRIDGE_AMD_PI_AVALON || SOUTHBRIDGE_AMD_PI_KERN
 
 config SOUTHBRIDGE_SPECIFIC_OPTIONS
 	def_bool y
-	select IOAPIC
 	select HAVE_USBDEBUG_OPTIONS
 	select HAVE_CF9_RESET
 	select HAVE_CF9_RESET_PREPARE

src/southbridge/intel/bd82x6x/Kconfig

@@ -23,7 +23,6 @@ config SOUTH_BRIDGE_OPTIONS
 	select SOUTHBRIDGE_INTEL_COMMON_PMBASE
 	select SOUTHBRIDGE_INTEL_COMMON_RTC
 	select SOUTHBRIDGE_INTEL_COMMON_RESET
-	select IOAPIC
 	select HAVE_USBDEBUG_OPTIONS
 	select HAVE_SMI_HANDLER
 	select USE_WATCHDOG_ON_BOOT

src/southbridge/intel/i82801dx/Kconfig

@@ -3,7 +3,6 @@
 config SOUTHBRIDGE_INTEL_I82801DX
 	bool
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
-	select IOAPIC
 	select HAVE_SMI_HANDLER
 	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
 	select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS

src/southbridge/intel/i82801gx/Kconfig

@@ -5,7 +5,6 @@ config SOUTHBRIDGE_INTEL_I82801GX
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ACPI_SOC_NVS
 	select AZALIA_PLUGIN_SUPPORT
-	select IOAPIC
 	select USE_WATCHDOG_ON_BOOT
 	select HAVE_SMI_HANDLER
 	select SOUTHBRIDGE_INTEL_COMMON_GPIO

src/southbridge/intel/i82801ix/Kconfig

@@ -8,7 +8,6 @@ config SOUTHBRIDGE_INTEL_I82801IX
 	select HAVE_SMI_HANDLER if !NO_SMM
 	select HAVE_USBDEBUG_OPTIONS
 	select INTEL_DESCRIPTOR_MODE_CAPABLE
-	select IOAPIC
 	select SOUTHBRIDGE_INTEL_COMMON_GPIO
 	select SOUTHBRIDGE_INTEL_COMMON_PMBASE
 	select SOUTHBRIDGE_INTEL_COMMON_PMCLIB

src/southbridge/intel/i82801jx/Kconfig

@@ -9,7 +9,6 @@ config SOUTHBRIDGE_INTEL_I82801JX
 	select HAVE_SMI_HANDLER
 	select HAVE_USBDEBUG_OPTIONS
 	select INTEL_DESCRIPTOR_MODE_CAPABLE
-	select IOAPIC
 	select SOUTHBRIDGE_INTEL_COMMON_GPIO
 	select SOUTHBRIDGE_INTEL_COMMON_PMBASE
 	select SOUTHBRIDGE_INTEL_COMMON_PMCLIB

src/southbridge/intel/ibexpeak/Kconfig

@@ -9,7 +9,6 @@ config SOUTH_BRIDGE_OPTIONS
 	def_bool y
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select AZALIA_PLUGIN_SUPPORT
-	select IOAPIC
 	select HAVE_SMI_HANDLER
 	select USE_WATCHDOG_ON_BOOT
 	select PCIEXP_ASPM

src/southbridge/intel/lynxpoint/Kconfig

@@ -19,7 +19,6 @@ config SOUTH_BRIDGE_OPTIONS
 	select SOUTHBRIDGE_INTEL_COMMON_PMBASE
 	select SOUTHBRIDGE_INTEL_COMMON_RTC
 	select SOUTHBRIDGE_INTEL_COMMON_RESET
-	select IOAPIC
 	select HAVE_SMI_HANDLER
 	select HAVE_USBDEBUG_OPTIONS
 	select USE_WATCHDOG_ON_BOOT