arch/x86: Rename some mainboard_romstage_entry()

These platforms use different signature for this function, so
declare them with different name to make room in global namespace.

Change-Id: I77be9099bf20e00ae6770e9ffe12301eda028819
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34909
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/kahlee/romstage.c

@@ -28,7 +28,7 @@ void __weak variant_romstage_entry(int s3_resume)
 	/* By default, don't do anything */
 }
 
-void mainboard_romstage_entry(int s3_resume)
+void mainboard_romstage_entry_s3(int s3_resume)
 {
 	size_t num_gpios;
 	const struct soc_amd_gpio *gpios;

src/mainboard/google/rambi/romstage.c

@@ -55,7 +55,7 @@ static void *get_spd_pointer(char *spd_file_content, int total_spds, int *dual)
 	return &spd_file_content[SPD_SIZE * ram_id];
 }
 
-void mainboard_romstage_entry(struct romstage_params *rp)
+void mainboard_romstage_entry_rp(struct romstage_params *rp)
 {
 	void *spd_content;
 	int dual_channel = 0;

src/soc/amd/picasso/include/soc/romstage.h

@@ -16,6 +16,6 @@
 #ifndef __PICASSO_ROMSTAGE_H__
 #define __PICASSO_ROMSTAGE_H__
 
-void mainboard_romstage_entry(int s3_resume);
+void mainboard_romstage_entry_s3(int s3_resume);
 
 #endif /* __PICASSO_ROMSTAGE_H__ */

src/soc/amd/picasso/romstage.c

@@ -34,7 +34,7 @@
 
 #include "chip.h"
 
-void __weak mainboard_romstage_entry(int s3_resume)
+void __weak mainboard_romstage_entry_s3(int s3_resume)
 {
 	/* By default, don't do anything */
 }
@@ -49,7 +49,7 @@ asmlinkage void car_stage_entry(void)
 
 	console_init();
 
-	mainboard_romstage_entry(s3_resume);
+	mainboard_romstage_entry_s3(s3_resume);
 
 	if (!s3_resume) {
 		post_code(0x40);

src/soc/amd/stoneyridge/include/soc/romstage.h

@@ -16,6 +16,6 @@
 #ifndef __STONEYRIDGE_ROMSTAGE_H__
 #define __STONEYRIDGE_ROMSTAGE_H__
 
-void mainboard_romstage_entry(int s3_resume);
+void mainboard_romstage_entry_s3(int s3_resume);
 
 #endif /* __STONEYRIDGE_ROMSTAGE_H__ */

src/soc/amd/stoneyridge/romstage.c

@@ -37,7 +37,7 @@
 
 #include "chip.h"
 
-void __weak mainboard_romstage_entry(int s3_resume)
+void __weak mainboard_romstage_entry_s3(int s3_resume)
 {
 	/* By default, don't do anything */
 }
@@ -97,7 +97,7 @@ asmlinkage void car_stage_entry(void)
 	if (CONFIG(SOC_AMD_PSP_SELECTABLE_SMU_FW))
 		load_smu_fw1();
 
-	mainboard_romstage_entry(s3_resume);
+	mainboard_romstage_entry_s3(s3_resume);
 
 	bsp_agesa_call();
 

src/soc/intel/baytrail/include/soc/romstage.h

@@ -28,7 +28,7 @@ struct romstage_params {
 	struct mrc_params *mrc_params;
 };
 
-void mainboard_romstage_entry(struct romstage_params *params);
+void mainboard_romstage_entry_rp(struct romstage_params *params);
 void romstage_common(struct romstage_params *params);
 
 void raminit(struct mrc_params *mp, int prev_sleep_state);

src/soc/intel/baytrail/romstage/romstage.c

@@ -146,7 +146,7 @@ static void romstage_main(uint64_t tsc)
 	gfx_init();
 
 	/* Call into mainboard. */
-	mainboard_romstage_entry(&rp);
+	mainboard_romstage_entry_rp(&rp);
 
 	if (CONFIG(SMM_TSEG))
 		smm_list_regions();