sb/intel/i82801jx/sata.c: Simplify constant is_mobile parameter
Tested with BUILD_TIMELESS=1, Intel DG43GT does not change. Change-Id: I30cdca0240afced2949639193caa2f11aca1c60d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44337 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Michael Niewöhner
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@ -15,8 +15,7 @@
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typedef struct southbridge_intel_i82801jx_config config_t;
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static void sata_enable_ahci_mmap(struct device *const dev, const u8 port_map,
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const int is_mobile)
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static void sata_enable_ahci_mmap(struct device *const dev, const u8 port_map)
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{
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int i;
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u32 reg32;
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@ -56,14 +55,12 @@ static void sata_enable_ahci_mmap(struct device *const dev, const u8 port_map,
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/* Lock R/WO bits in Port command registers. */
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for (i = 0; i < 6; ++i) {
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if (((i == 2) || (i == 3)) && is_mobile)
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continue;
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u8 *addr = abar + 0x118 + (i * 0x80);
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write32(addr, read32(addr));
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}
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}
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static void sata_program_indexed(struct device *const dev, const int is_mobile)
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static void sata_program_indexed(struct device *const dev)
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{
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u32 reg32;
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@ -82,31 +79,25 @@ static void sata_program_indexed(struct device *const dev, const int is_mobile)
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pci_write_config8(dev, D31F2_SIDX, 0x78);
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pci_write_config8(dev, D31F2_SDAT + 2, 0x22);
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if (!is_mobile) {
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pci_write_config8(dev, D31F2_SIDX, 0x84);
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reg32 = pci_read_config32(dev, D31F2_SDAT);
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reg32 &= ~((7 << 3) | (7 << 0));
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reg32 |= (3 << 3) | (3 << 0);
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pci_write_config32(dev, D31F2_SDAT, reg32);
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}
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pci_write_config8(dev, D31F2_SIDX, 0x84);
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reg32 = pci_read_config32(dev, D31F2_SDAT);
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reg32 &= ~((7 << 3) | (7 << 0));
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reg32 |= (3 << 3) | (3 << 0);
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pci_write_config32(dev, D31F2_SDAT, reg32);
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pci_write_config8(dev, D31F2_SIDX, 0x88);
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reg32 = pci_read_config32(dev, D31F2_SDAT);
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if (!is_mobile)
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reg32 &= ~((7 << 27) | (7 << 24) | (7 << 11) | (7 << 8));
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reg32 &= ~((7 << 19) | (7 << 16) | (7 << 3) | (7 << 0));
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if (!is_mobile)
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reg32 |= (4 << 27) | (4 << 24) | (2 << 11) | (2 << 8);
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reg32 |= (4 << 19) | (4 << 16) | (2 << 3) | (2 << 0);
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reg32 &= ~((7 << 27) | (7 << 24) | (7 << 11) | (7 << 8));
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reg32 &= ~((7 << 19) | (7 << 16) | (7 << 3) | (7 << 0));
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reg32 |= (4 << 27) | (4 << 24) | (2 << 11) | (2 << 8);
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reg32 |= (4 << 19) | (4 << 16) | (2 << 3) | (2 << 0);
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pci_write_config32(dev, D31F2_SDAT, reg32);
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pci_write_config8(dev, D31F2_SIDX, 0x8c);
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reg32 = pci_read_config32(dev, D31F2_SDAT);
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if (!is_mobile)
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reg32 &= ~((7 << 27) | (7 << 24));
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reg32 &= ~((7 << 27) | (7 << 24));
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reg32 &= ~((7 << 19) | (7 << 16) | 0xffff);
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if (!is_mobile)
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reg32 |= (2 << 27) | (2 << 24);
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reg32 |= (2 << 27) | (2 << 24);
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reg32 |= (2 << 19) | (2 << 16) | 0x00aa;
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pci_write_config32(dev, D31F2_SDAT, reg32);
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@ -200,9 +191,9 @@ static void sata_init(struct device *const dev)
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pci_write_config32(dev, 0x94, sclkcg);
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if (sata_mode == 0)
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sata_enable_ahci_mmap(dev, config->sata_port_map, 0);
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sata_enable_ahci_mmap(dev, config->sata_port_map);
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sata_program_indexed(dev, 0);
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sata_program_indexed(dev);
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}
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static void sata_enable(struct device *dev)
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