google/reef: Enable I2C TPM

Enable the I2C based TPM on the reef board at
bus 2 and address 0x50.

This makes vboot functional without needing MOCK_TPM and
results in the following in the SSDT:

Device (TPMI)
{
  Name (_HID, "GOOG0005")  // _HID: Hardware ID
  Name (_UID, Zero)  // _UID: Unique ID
  Name (_DDN, "I2C TPM")  // _DDN: DOS Device Name
  Method (_STA, 0, NotSerialized)  // _STA: Status
  {
    Return (0x0F)
  }

  Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
  {
    I2cSerialBus (0x0050, ControllerInitiated, 0x00061A80,
                  AddressingMode7Bit, "\\_SB.PCI0.I2C2",
                  0x00, ResourceConsumer)
    Interrupt (ResourceConsumer, Edge, ActiveLow, Exclusive)
    {
      0x00000039
    }
  })
}

Change-Id: Ia9775caabeac3e6a3bd72de38f9611b4cea7cea4
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16398
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2016-09-01 16:00:05 -07:00
parent 6eb8e1d6cc
commit c2875872c8
2 changed files with 16 additions and 2 deletions

View File

@ -7,8 +7,10 @@ config BOARD_GOOGLE_BASEBOARD_REEF
select EC_GOOGLE_CHROMEEC_LPC
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select I2C_TPM
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_TPM2
select TPM2
if BOARD_GOOGLE_BASEBOARD_REEF
@ -16,6 +18,12 @@ config BASEBOARD_REEF_LAPTOP
def_bool n
select SYSTEM_TYPE_LAPTOP
config DRIVER_TPM_I2C_BUS
hex "0x2"
config DRIVER_TPM_I2C_ADDR
hex "0x50"
config CHROMEOS
select LID_SWITCH if BASEBOARD_REEF_LAPTOP

View File

@ -99,7 +99,13 @@ chip soc/intel/apollolake
end
end
device pci 16.1 on end # - I2C 1
device pci 16.2 on end # - I2C 2
device pci 16.2 on
chip drivers/i2c/tpm
register "hid" = ""GOOG0005""
register "irq" = "IRQ_EDGE_LOW(GPIO_28_IRQ)"
device i2c 50 on end
end
end # - I2C 2
device pci 16.3 on
chip drivers/i2c/generic
register "hid" = ""ELAN0001""