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baytrail: Put devices in ACPI mode after setup 

Make sure reg_script is executed before the device is put into
ACPI mode.

BUG=chrome-os-partner:24380
BRANCH=none
TEST=build and boot rambi from eMMC in ACPI mode

Change-Id: I4090babbfc7fb0f3be4da869386e998d87a513ba
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179896
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5017
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Duncan Laurie 2013-12-12 16:55:36 -08:00 committed by Kyösti Mälkki
parent d82caded48
commit c29d6b8ab2
2 changed files with 4 additions and 4 deletions
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5
src/soc/intel/baytrail/emmc.c
View File

@ -53,10 +53,11 @@ static void emmc_init(device_t dev)
{ {
struct soc_intel_baytrail_config *config = dev->chip_info; struct soc_intel_baytrail_config *config = dev->chip_info;
if (config->scc_acpi_mode)
scc_enable_acpi_mode(dev, SCC_MMC_CTL, SCC_NVS_MMC);
printk(BIOS_DEBUG, "eMMC init\n"); printk(BIOS_DEBUG, "eMMC init\n");
reg_script_run_on_dev(dev, emmc_ops); reg_script_run_on_dev(dev, emmc_ops);
if (config->scc_acpi_mode)
scc_enable_acpi_mode(dev, SCC_MMC_CTL, SCC_NVS_MMC);
} }
static struct device_operations device_ops = { static struct device_operations device_ops = {

3
src/soc/intel/baytrail/lpss.c
View File

@ -165,11 +165,10 @@ static void lpss_init(device_t dev)
return; return;
} }
dev_enable_snoop_and_pm(dev, iosf_reg); dev_enable_snoop_and_pm(dev, iosf_reg);
i2c_disable_resets(dev);
if (config->lpss_acpi_mode) if (config->lpss_acpi_mode)
dev_enable_acpi_mode(dev, iosf_reg, nvs_index); dev_enable_acpi_mode(dev, iosf_reg, nvs_index);
i2c_disable_resets(dev);
} }
static struct device_operations device_ops = { static struct device_operations device_ops = {