soc/intel/apollolake: provide poweroff() implementation
Implement poweroff() by putting the chipset into ACPI S5 state. BUG=chrome-os-partner:54977 Change-Id: I4ee269f03afd252d4bce909a8cc7c64d6270b16e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15686 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
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@ -21,6 +21,7 @@
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#include <console/console.h>
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#include <rules.h>
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#include <device/pci_def.h>
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#include <halt.h>
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#include <soc/iomap.h>
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#include <soc/pci_devs.h>
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#include <soc/pm.h>
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@ -413,3 +414,9 @@ void vboot_platform_prepare_reboot(void)
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const uint16_t port = ACPI_PMIO_BASE + PM1_CNT;
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outl((inl(port) & ~(SLP_TYP)) | (SLP_TYP_S5 << SLP_TYP_SHIFT), port);
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}
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void poweroff(void)
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{
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enable_pm1_control(SLP_EN | (SLP_TYP_S5 << SLP_TYP_SHIFT));
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halt();
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}
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