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mb/lenovo/haswell: Convert to variant setup

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In preparation to CB:63514, make use of the variant concept and convert
the existing T440p mainboard into a variant.

Change-Id: I3c7e06607135ce0a62c158e296b51e5311234505
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63513
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Felix Singer 2022-04-09 05:44:39 +02:00
parent 851435e379
commit c2d1588623
9 changed files with 58 additions and 40 deletions
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19
src/mainboard/lenovo/haswell/Kconfig
View file

@ -1,7 +1,5 @@
if BOARD_LENOVO_THINKPAD_T440P
config BOARD_SPECIFIC_OPTIONS
def_bool y
config BOARD_LENOVO_HASWELL_COMMON
def_bool n
select BOARD_ROMSIZE_KB_12288
select EC_LENOVO_H8
select EC_LENOVO_PMH7
@ -23,6 +21,11 @@ config BOARD_SPECIFIC_OPTIONS
select SOUTHBRIDGE_INTEL_LYNXPOINT
select SYSTEM_TYPE_LAPTOP
config BOARD_LENOVO_THINKPAD_T440P
select BOARD_LENOVO_HASWELL_COMMON
if BOARD_LENOVO_HASWELL_COMMON
config VBOOT
select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
select GBB_FLAG_DISABLE_FWMP
@ -38,6 +41,12 @@ config VBOOT_VBNV_OFFSET
hex
default 0x2a
config VARIANT_DIR
default "t440p" if BOARD_LENOVO_THINKPAD_T440P
config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config FMDFILE
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwab.fmd" if VBOOT
@ -45,7 +54,7 @@ config MAINBOARD_DIR
default "lenovo/haswell"
config MAINBOARD_PART_NUMBER
default "ThinkPad T440p"
default "ThinkPad T440p" if BOARD_LENOVO_THINKPAD_T440P
config VGA_BIOS_ID
string

7
src/mainboard/lenovo/haswell/Makefile.inc
View file

@ -1,2 +1,5 @@
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
romstage-y += variants/$(VARIANT_DIR)/gpio.c
romstage-y += variants/$(VARIANT_DIR)/romstage.c
ramstage-y += mainboard.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads

33
src/mainboard/lenovo/haswell/romstage.c
View file

@ -34,36 +34,3 @@ void mb_late_romstage_setup(void)
pci_and_config32(HOST_BRIDGE, DEVEN, ~DEVEN_D1F0EN);
}
}
void mb_get_spd_map(struct spd_info *spdi)
{
spdi->addresses[0] = 0x50;
spdi->addresses[2] = 0x51;
}
const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */
{ 0x0110, 1, 1, USB_PORT_BACK_PANEL }, /* USB2 charge */
{ 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL },
{ 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_DOCK },
{ 0x0080, 1, 2, USB_PORT_BACK_PANEL }, /* USB2 */
{ 0x0040, 1, 3, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 3, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0110, 1, 4, USB_PORT_BACK_PANEL }, /* WWAN */
{ 0x0040, 1, 5, USB_PORT_INTERNAL }, /* WLAN */
{ 0x0040, 1, 5, USB_PORT_BACK_PANEL }, /* webcam */
{ 0x0080, 1, 6, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
};
const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = {
{ 1, 0 },
{ 1, 0 },
{ 1, USB_OC_PIN_SKIP },
{ 1, USB_OC_PIN_SKIP },
{ 1, 1 },
{ 1, 1 }, /* WWAN */
};

0
src/mainboard/lenovo/haswell/data.vbt → src/mainboard/lenovo/haswell/variants/t440p/data.vbt
View file

0
src/mainboard/lenovo/haswell/devicetree.cb → src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb
View file

0
src/mainboard/lenovo/haswell/gma-mainboard.ads → src/mainboard/lenovo/haswell/variants/t440p/gma-mainboard.ads
View file

0
src/mainboard/lenovo/haswell/gpio.c → src/mainboard/lenovo/haswell/variants/t440p/gpio.c
View file

0
src/mainboard/lenovo/haswell/hda_verb.c → src/mainboard/lenovo/haswell/variants/t440p/hda_verb.c
View file

39
src/mainboard/lenovo/haswell/variants/t440p/romstage.c Normal file
View file

@ -0,0 +1,39 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <stdint.h>
#include <northbridge/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/lynxpoint/pch.h>
void mb_get_spd_map(struct spd_info *spdi)
{
spdi->addresses[0] = 0x50;
spdi->addresses[2] = 0x51;
}
const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */
{ 0x0110, 1, 1, USB_PORT_BACK_PANEL }, /* USB2 charge */
{ 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL },
{ 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_DOCK },
{ 0x0080, 1, 2, USB_PORT_BACK_PANEL }, /* USB2 */
{ 0x0040, 1, 3, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 3, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0110, 1, 4, USB_PORT_BACK_PANEL }, /* WWAN */
{ 0x0040, 1, 5, USB_PORT_INTERNAL }, /* WLAN */
{ 0x0040, 1, 5, USB_PORT_BACK_PANEL }, /* webcam */
{ 0x0080, 1, 6, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
};
const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = {
{ 1, 0 },
{ 1, 0 },
{ 1, USB_OC_PIN_SKIP },
{ 1, USB_OC_PIN_SKIP },
{ 1, 1 },
{ 1, 1 }, /* WWAN */
};