mb/google/hatch: Update GPIO settings for SD card and SPI1 Chip select
This patch updates the following GPIO settings. 1. Set Native termination for GPP_G0 - G4 SD card pins. 2. Set GPP_B19 to NF1. BUG=b:123907904 TEST=Verified SD card functionality on hatch. Checked for SD detection, transferred files to and from SD card. Change-Id: I4549ac7377d7f58f51cda0eb96a62604fd31d2f2 Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32176 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -99,8 +99,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1),
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/* B18 : H1_SLAVE_SPI_MOSI_R */
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PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
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/* B19 : GPP_B19 ==> NC */
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PAD_NC(GPP_B19, NONE),
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/* B19 : Set to NF1 to match FSP setting it to NF1, i.e., GSPI1_CS0# */
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PAD_CFG_NF(GPP_B19, NONE, DEEP, NF1),
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/* B20 : PCH_SPI_FPMCU_CLK_R */
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PAD_CFG_NF(GPP_B20, NONE, DEEP, NF1),
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/* B21 : PCH_SPI_FPMCU_MISO */
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@ -311,15 +311,15 @@ static const struct pad_config gpio_table[] = {
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PAD_NC(GPP_F23, NONE),
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/* G0 : SD_CMD */
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PAD_CFG_NF(GPP_G0, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_G0, NATIVE, DEEP, NF1),
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/* G1 : SD_DATA0 */
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PAD_CFG_NF(GPP_G1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_G1, NATIVE, DEEP, NF1),
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/* G2 : SD_DATA1 */
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PAD_CFG_NF(GPP_G2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_G2, NATIVE, DEEP, NF1),
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/* G3 : SD_DATA2 */
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PAD_CFG_NF(GPP_G3, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_G3, NATIVE, DEEP, NF1),
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/* G4 : SD_DATA3 */
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PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_G4, NATIVE, DEEP, NF1),
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/* G5 : SD_CD# */
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PAD_CFG_NF(GPP_G5, NONE, PLTRST, NF1),
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/* G6 : SD_CLK */
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