soc/amd/common/psp_verstage: Introduce boot device driver
PSP verstage can access the boot device either in Programmed I/O mode or DMA mode. Introduce a boot device driver and use the appropriate mode based on the SoC support. BUG=b:194990811 TEST=Build and boot to OS in Guybrush. Change-Id: I8ca5290156199548916852e48f4e11de7cb886fb Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57563 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -8,5 +8,6 @@ if SOC_AMD_COMMON
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source "src/soc/amd/common/block/*/Kconfig"
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source "src/soc/amd/common/fsp/Kconfig"
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source "src/soc/amd/common/pi/Kconfig"
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source "src/soc/amd/common/psp_verstage/Kconfig"
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endif # SOC_AMD_COMMON
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@ -0,0 +1,7 @@
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config PSP_VERSTAGE_CCP_DMA
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bool
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default n
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help
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Configure PSP Verstage to use Crypto Co-processor (CCP) DMA while
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accessing the boot device. Select it on platforms which supports
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using CCP DMA to access the boot device.
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@ -7,6 +7,7 @@ CPPFLAGS_common += -I$(VBOOT_SOURCE)/firmware/2lib/include/
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# This size should match the size in the linker script.
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CFLAGS_arm += -Wstack-usage=40960
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verstage-y += boot_dev.c
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verstage-y += delay.c
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verstage-y += fch.c
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verstage-y += pmutil.c
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@ -0,0 +1,85 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "psp_verstage.h"
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#include <bl_uapp/bl_errorcodes_public.h>
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#include <bl_uapp/bl_syscall_public.h>
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#include <boot_device.h>
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#include <commonlib/region.h>
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#include <console/console.h>
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#include <string.h>
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#define DEST_BUF_ALIGNMENT 16
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static void *boot_dev_mmap(const struct region_device *rd, size_t offset, size_t size __unused)
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{
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const struct mem_region_device *mdev;
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mdev = container_of(rd, __typeof__(*mdev), rdev);
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return &(mdev->base[offset]);
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}
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static int boot_dev_munmap(const struct region_device *rd __unused, void *mapping __unused)
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{
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return 0;
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}
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static ssize_t boot_dev_dma_readat(const struct region_device *rd, void *dest,
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size_t offset, size_t size)
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{
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size_t memcpy_size = ALIGN_UP((uintptr_t)dest, DEST_BUF_ALIGNMENT) - (uintptr_t)dest;
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const struct mem_region_device *mdev = container_of(rd, __typeof__(*mdev), rdev);
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int ret;
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if (memcpy_size > size)
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memcpy_size = size;
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/* Alignment requirement is only on dest buffer for CCP DMA. So do a memcpy
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until the destination buffer alignment requirement is met. */
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if (memcpy_size)
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memcpy(dest, &(mdev->base[offset]), memcpy_size);
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dest = ((char *)dest + memcpy_size);
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offset += memcpy_size;
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size -= memcpy_size;
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if (!size)
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return memcpy_size;
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ret = svc_ccp_dma((uint32_t)offset, dest, (uint32_t)size);
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if (ret != BL_OK) {
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printk(BIOS_ERR, "%s: Failed dest:%p offset:%zu size:%zu ret:%d\n",
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__func__, dest, offset, size, ret);
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return -1;
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}
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return size + memcpy_size;
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}
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static ssize_t boot_dev_readat(const struct region_device *rd, void *dest,
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size_t offset, size_t size)
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{
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const struct mem_region_device *mdev = container_of(rd, __typeof__(*mdev), rdev);
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if (CONFIG(PSP_VERSTAGE_CCP_DMA))
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return boot_dev_dma_readat(rd, dest, offset, size);
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memcpy(dest, &(mdev->base[offset]), size);
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return size;
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}
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const struct region_device_ops boot_dev_rdev_ro_ops = {
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.mmap = boot_dev_mmap,
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.munmap = boot_dev_munmap,
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.readat = boot_dev_readat,
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};
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static struct mem_region_device boot_dev = {
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.rdev = REGION_DEV_INIT(&boot_dev_rdev_ro_ops, 0, CONFIG_ROM_SIZE),
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};
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const struct region_device *boot_device_ro(void)
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{
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if (!boot_dev.base)
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boot_dev.base = (void *)map_spi_rom();
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return &boot_dev.rdev;
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}
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@ -6,6 +6,7 @@
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#include <bl_uapp/bl_syscall_public.h>
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#include <boot_device.h>
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#include <cbfs.h>
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#include <commonlib/region.h>
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#include <console/console.h>
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#include <fmap.h>
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#include <pc80/mc146818rtc.h>
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@ -20,8 +21,6 @@
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#include <timestamp.h>
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extern char _bss_start, _bss_end;
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static struct mem_region_device boot_dev =
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MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE);
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void __weak verstage_mainboard_early_init(void) {}
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void __weak verstage_mainboard_init(void) {}
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@ -82,6 +81,7 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
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uint32_t *psp_dir_in_spi, *bios_dir_in_spi;
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const char *fname;
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void *amdfw_location;
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void *boot_dev_base = rdev_mmap_full(boot_device_ro());
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/* Continue booting from RO */
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if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) {
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@ -109,9 +109,9 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
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psp_dir_addr = ef_table->psp_table;
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bios_dir_addr = get_bios_dir_addr(ef_table);
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psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) +
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(uint32_t)boot_dev.base);
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(uint32_t)boot_dev_base);
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bios_dir_in_spi = (uint32_t *)((bios_dir_addr & SPI_ADDR_MASK) +
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(uint32_t)boot_dev.base);
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(uint32_t)boot_dev_base);
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if (*psp_dir_in_spi != PSP_COOKIE) {
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printk(BIOS_ERR, "Error: PSP Directory address is not correct.\n");
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return POSTCODE_PSP_COOKIE_MISMATCH_ERROR;
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@ -200,6 +200,7 @@ void Main(void)
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{
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uint32_t retval;
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struct vb2_context *ctx = NULL;
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void *boot_dev_base;
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/*
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* Do not use printk() before console_init()
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@ -259,8 +260,9 @@ void Main(void)
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post_code(POSTCODE_UNMAP_SPI_ROM);
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if (boot_dev.base) {
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if (svc_unmap_spi_rom((void *)boot_dev.base))
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boot_dev_base = rdev_mmap_full(boot_device_ro());
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if (boot_dev_base) {
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if (svc_unmap_spi_rom((void *)boot_dev_base))
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printk(BIOS_ERR, "Error unmapping SPI rom\n");
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}
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@ -273,16 +275,6 @@ void Main(void)
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svc_exit(retval);
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}
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const struct region_device *boot_device_ro(void)
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{
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uintptr_t *addr;
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addr = map_spi_rom();
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mem_region_device_ro_init(&boot_dev, (void *)addr, CONFIG_ROM_SIZE);
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return &boot_dev.rdev;
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}
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/*
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* The stage_entry function is not used directly, but stage_entry() is marked as an entry
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* point in arm/arch/header.h, so if stage_entry() isn't present and calling Main(), all
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