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AMD k8 fam10: Refactor S3 recovery 

Change-Id: I09c218ca05391e8d80880be0aa5bdfd5079acf85
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15465
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2016-06-28 07:38:03 +03:00
parent 1891bfdac6
commit c30bfcaa9e
1 changed files with 16 additions and 20 deletions
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32
src/cpu/amd/car/post_cache_as_ram.c
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@ -63,12 +63,14 @@ static int memcmp_(void *d, const void *s, size_t len)
return memcmp(d, s, len);
}
static void prepare_romstage_ramstack(void *resume_backup_memory)
static void prepare_romstage_ramstack(int s3resume)
{
size_t backup_top = backup_size();
print_car_debug("Prepare CAR migration and stack regions...");
if (resume_backup_memory) {
if (s3resume) {
void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
if (resume_backup_memory)
memcpy_(resume_backup_memory + HIGH_MEMORY_SAVE - backup_top,
(void *)(CONFIG_RAMTOP - backup_top), backup_top);
}
@ -77,13 +79,16 @@ static void prepare_romstage_ramstack(void *resume_backup_memory)
print_car_debug(" Done\n");
}
static void prepare_ramstage_region(void *resume_backup_memory)
static void prepare_ramstage_region(int s3resume)
{
size_t backup_top = backup_size();
print_car_debug("Prepare ramstage memory region...");
if (resume_backup_memory) {
memcpy_(resume_backup_memory, (void *) CONFIG_RAMBASE, HIGH_MEMORY_SAVE - backup_top);
if (s3resume) {
void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
if (resume_backup_memory)
memcpy_(resume_backup_memory, (void *) CONFIG_RAMBASE,
HIGH_MEMORY_SAVE - backup_top);
memset_((void*) CONFIG_RAMBASE, 0, HIGH_MEMORY_SAVE - backup_top);
} else {
memset_((void*)0, 0, CONFIG_RAMTOP - backup_top);
@ -115,7 +120,6 @@ static void vErrata343(void)
void post_cache_as_ram(void)
{
void *resume_backup_memory = NULL;
uint32_t family = amd_fam1x_cpu_family();
/* Verify that the BSP didn't overrun the lower stack
@ -134,11 +138,10 @@ void post_cache_as_ram(void)
printk(BIOS_DEBUG, "Romstage handoff structure not added!\n");
int s3resume = acpi_is_wakeup_s3();
if (s3resume) {
if (s3resume)
cbmem_recovery(s3resume);
resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
}
prepare_romstage_ramstack(resume_backup_memory);
prepare_romstage_ramstack(s3resume);
/* from here don't store more data in CAR */
if (family >= 0x1f && family <= 0x3f) {
@ -168,9 +171,6 @@ void post_cache_as_ram(void)
void cache_as_ram_new_stack (void)
{
void *resume_backup_memory = NULL;
print_car_debug("Top about %08x ... Done\n", (uint32_t) &resume_backup_memory);
print_car_debug("Disabling cache as ram now\n");
disable_cache_as_ram_bsp();
@ -179,11 +179,7 @@ void cache_as_ram_new_stack (void)
set_var_mtrr(0, 0x00000000, CACHE_TMP_RAMTOP, MTRR_TYPE_WRBACK);
enable_cache();
if (acpi_is_wakeup_s3()) {
resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
print_car_debug("Resume backup memory location: %p\n", resume_backup_memory);
}
prepare_ramstage_region(resume_backup_memory);
prepare_ramstage_region(acpi_is_wakeup_s3());
set_sysinfo_in_ram(1); // So other core0 could start to train mem