soc/intel/skylake: Perform LPC offset read after lockdown operation

This patch is to provide an additional read LPC pci offset register
BIOS_CONTROL (BC) - offset 0xDC to ensure that the last write is
successful.

Change-Id: I308c0622d348fc96c410a04ab4081bb6af98e874
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20678
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/skylake/finalize.c

@@ -185,6 +185,9 @@ static void soc_lockdown(void)
 				  pci_read_config8(PCH_DEV_LPC,
 						   BIOS_CNTL) | LPC_BC_LE);
 
+		/* Ensure an additional read back after performing lock down */
+		pci_read_config8(PCH_DEV_LPC, BIOS_CNTL);
+
 		fast_spi_set_lock_enable();
 	}
 
@@ -194,6 +197,9 @@ static void soc_lockdown(void)
 				  pci_read_config8(PCH_DEV_LPC,
 						   BIOS_CNTL) | LPC_BC_EISS);
 
+		/* Ensure an additional read back after performing lock down */
+		pci_read_config8(PCH_DEV_LPC, BIOS_CNTL);
+
 		fast_spi_set_eiss();
 	}
 }