mb/google/puff/var/dooly: Update DPTF parameters
DPTF paramerters form thermal team. Set PL1 Min/Max 15/25W, PL2 Min/Max 40/49W. BUG=b:174514010 BRANCH=puff TEST=build image and verified by thermal team. Change-Id: I9e6c4bae181e87f87f2e92337bb9d989f5b7d955 Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48206 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
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chip soc/intel/cannonlake
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chip soc/intel/cannonlake
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register "power_limits_config" = "{
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.tdp_pl1_override = 25,
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.tdp_pl2_override = 49,
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}"
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# Auto-switch between X4 NVMe and X2 NVMe.
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# Auto-switch between X4 NVMe and X2 NVMe.
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register "TetonGlacierMode" = "1"
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register "TetonGlacierMode" = "1"
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@ -176,47 +181,36 @@ chip soc/intel/cannonlake
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chip drivers/intel/dptf
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chip drivers/intel/dptf
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## Active Policy
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## Active Policy
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register "policies.active[0]" = "{.target=DPTF_CPU,
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register "policies.active[0]" = "{.target=DPTF_CPU,
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.thresholds={TEMP_PCT(90, 85),
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.thresholds={TEMP_PCT(90, 0),}}"
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TEMP_PCT(85, 75),
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TEMP_PCT(80, 65),
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TEMP_PCT(75, 55),
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TEMP_PCT(70, 45),}}"
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register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0,
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register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0,
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.thresholds={TEMP_PCT(50, 85),
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.thresholds={TEMP_PCT(75, 60),
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TEMP_PCT(47, 75),
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TEMP_PCT(65, 50),
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TEMP_PCT(45, 65),
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TEMP_PCT(45, 40),
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TEMP_PCT(42, 55),
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TEMP_PCT(30, 30),}}"
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TEMP_PCT(39, 45),}}"
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## Passive Policy
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## Passive Policy
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register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)"
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register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 70, 60000)"
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register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)"
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register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 76, 60000)"
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## Critical Policy
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## Critical Policy
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register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
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register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 105, SHUTDOWN)"
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register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)"
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register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 78, SHUTDOWN)"
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## Power Limits Control
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## Power Limits Control
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# PL1 is fixed at 15W, avg over 28-32s interval
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# 15-25W PL1 in 1000mW increments, avg over 28-32s interval
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# 25-64W PL2 in 1000mW increments, avg over 28-32s interval
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# 40-49W PL2 in 1000mW increments, avg over 28-32s interval
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register "controls.power_limits.pl1" = "{
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register "controls.power_limits.pl1" = "{
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.min_power = 15000,
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.min_power = 15000,
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.max_power = 15000,
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.max_power = 25000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,}"
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.granularity = 1000,}"
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register "controls.power_limits.pl2" = "{
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register "controls.power_limits.pl2" = "{
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.min_power = 25000,
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.min_power = 40000,
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.max_power = 64000,
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.max_power = 49000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,}"
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.granularity = 1000,}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf[0]" = "{ 255, 1700 }"
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register "controls.charger_perf[1]" = "{ 24, 1500 }"
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register "controls.charger_perf[2]" = "{ 16, 1000 }"
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register "controls.charger_perf[3]" = "{ 8, 500 }"
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## Fan Performance Control (Percent, Speed, Noise, Power)
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## Fan Performance Control (Percent, Speed, Noise, Power)
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register "controls.fan_perf[0]" = "{ 90, 6700, 220, 2200, }"
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register "controls.fan_perf[0]" = "{ 90, 6700, 220, 2200, }"
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