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nb/intel/gm45: Drop unnecessary panel power handling 

Skip everything but the final setting of PP_CONTROL, i.e. triggering
the power up. The settings with PANEL_UNLOCK_REGS are useless as no
lockable registers were touched in between. Also the loop waiting for
the panel power up to finish was a no-op as the registers with the
power timings were never filled (see follow-up commits).

Change-Id: Ife27dcafdf197b2246c4e69f2bf7a3a6765d1d82
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/12884
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Nico Huber 2016-01-09 22:58:44 +01:00 committed by Martin Roth
parent 924f0a6421
commit c3571da263
1 changed files with 0 additions and 15 deletions
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15
src/northbridge/intel/gm45/gma.c
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@ -397,21 +397,6 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
| LVDS_CLOCK_BOTH_POWERUP_ALL : 0)
| LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL);
write32(mmio + PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_OFF);
write32(mmio + PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_RESET);
mdelay(1);
write32(mmio + PP_CONTROL, PANEL_UNLOCK_REGS
| PANEL_POWER_ON | PANEL_POWER_RESET);
printk (BIOS_DEBUG, "waiting for panel powerup\n");
while (1) {
u32 reg32;
reg32 = read32(mmio + PP_STATUS);
if (((reg32 >> 28) & 3) == 0)
break;
}
printk (BIOS_DEBUG, "panel powered up\n");
write32(mmio + PP_CONTROL, PANEL_POWER_ON | PANEL_POWER_RESET);
/* Enable screen memory. */