nb/intel/gm45: Drop unnecessary panel power handling
Skip everything but the final setting of PP_CONTROL, i.e. triggering the power up. The settings with PANEL_UNLOCK_REGS are useless as no lockable registers were touched in between. Also the loop waiting for the panel power up to finish was a no-op as the registers with the power timings were never filled (see follow-up commits). Change-Id: Ife27dcafdf197b2246c4e69f2bf7a3a6765d1d82 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/12884 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -397,21 +397,6 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
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| LVDS_CLOCK_BOTH_POWERUP_ALL : 0)
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| LVDS_CLOCK_BOTH_POWERUP_ALL : 0)
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| LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL);
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| LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL);
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write32(mmio + PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_OFF);
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write32(mmio + PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_RESET);
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mdelay(1);
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write32(mmio + PP_CONTROL, PANEL_UNLOCK_REGS
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| PANEL_POWER_ON | PANEL_POWER_RESET);
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printk (BIOS_DEBUG, "waiting for panel powerup\n");
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while (1) {
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u32 reg32;
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reg32 = read32(mmio + PP_STATUS);
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if (((reg32 >> 28) & 3) == 0)
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break;
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}
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printk (BIOS_DEBUG, "panel powered up\n");
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write32(mmio + PP_CONTROL, PANEL_POWER_ON | PANEL_POWER_RESET);
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write32(mmio + PP_CONTROL, PANEL_POWER_ON | PANEL_POWER_RESET);
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/* Enable screen memory. */
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/* Enable screen memory. */
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