diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig
index b39338156b..8392e2f9ca 100644
--- a/src/soc/amd/sabrina/Kconfig
+++ b/src/soc/amd/sabrina/Kconfig
@@ -399,8 +399,8 @@ config PSP_SOFTFUSE_BITS
 	  Bit 0:  Enable secure debug (Set by PSP_UNLOCK_SECURE_DEBUG)
 	  Bit 7:  Disable PSP postcodes on Renoir and newer chips only
 	          (Set by PSP_DISABLE_PORT80)
-	  Bit 15: PSP post code destination: 0=LPC 1=eSPI
-	          (Set by PSP_INITIALIZE_ESPI)
+	  Bit 15: PSP debug output destination:
+	          0=SoC MMIO UART, 1=IO port 0x3F8
 	  Bit 29: Disable MP2 firmware loading (Set by PSP_LOAD_MP2_FW)
 
 	  See #55758 (NDA) for additional bit definitions.
diff --git a/src/soc/amd/sabrina/Makefile.inc b/src/soc/amd/sabrina/Makefile.inc
index 74124d25a7..b180156d9a 100644
--- a/src/soc/amd/sabrina/Makefile.inc
+++ b/src/soc/amd/sabrina/Makefile.inc
@@ -97,10 +97,6 @@ ifeq ($(CONFIG_PSP_DISABLE_POSTCODES),y)
 PSP_SOFTFUSE_BITS += 7
 endif
 
-ifeq ($(CONFIG_PSP_POSTCODES_ON_ESPI),y)
-PSP_SOFTFUSE_BITS += 15
-endif
-
 ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
 # Enable secure debug unlock
 PSP_SOFTFUSE_BITS += 0