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mb/google/nissa/var/craaskov: Add memory parts support 

Add new memory parts in the mem_parts_used.txt and generate the
SPD ID for the parts. The memory parts being added are:

1) LP5 Memory - 2GB Micron MT62F512M32D2DR-031 WT:B
2) LP5 Memory - 2GB Hynix H9JCNNNBK3MLYR-N6E
3) LP5 Memory - 4GB Samsung K3LKBKB0BM-MGCP
4) LP5 Memory - 4GB Hynix H9JCNNNCP3MLYR-N6E

DRAM Part Name                 ID to assign
MT62F512M32D2DR-031 WT:B       0 (0000)
H9JCNNNBK3MLYR-N6E             0 (0000)
K3LKBKB0BM-MGCP                1 (0001)
H9JCNNNCP3MLYR-N6E             2 (0010)

BUG=b:292461498
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot

Change-Id: I02e49d60e43c4fed8356556ec194d726c30cd609
Signed-off-by: Rex Chou <rex_chou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Reviewed-by: Derek Huang <derekhuang@google.com>
This commit is contained in:
Rex Chou 2023-07-24 16:30:13 +08:00 committed by Felix Held
parent d8f669ef55
commit c364f42147
3 changed files with 19 additions and 2 deletions
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8
src/mainboard/google/brya/variants/craaskov/memory/Makefile.inc
View File

@ -1,5 +1,9 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!! # This is an auto-generated file. Do not edit!!
# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. # Generated by:
# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/craaskov/memory/ src/mainboard/google/brya/variants/craaskov/memory/mem_parts_used.txt
SPD_SOURCES = placeholder SPD_SOURCES =
SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E
SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 1(0b0001) Parts = K3LKBKB0BM-MGCP
SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 2(0b0010) Parts = H9JCNNNCP3MLYR-N6E

9
src/mainboard/google/brya/variants/craaskov/memory/dram_id.generated.txt
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@ -1 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Generated by:
# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/craaskov/memory/ src/mainboard/google/brya/variants/craaskov/memory/mem_parts_used.txt
DRAM Part Name ID to assign DRAM Part Name ID to assign
MT62F512M32D2DR-031 WT:B 0 (0000)
H9JCNNNBK3MLYR-N6E 0 (0000)
K3LKBKB0BM-MGCP 1 (0001)
H9JCNNNCP3MLYR-N6E 2 (0010)

4
src/mainboard/google/brya/variants/craaskov/memory/mem_parts_used.txt
View File

@ -9,3 +9,7 @@
# See util/spd_tools/README.md for more details and instructions. # See util/spd_tools/README.md for more details and instructions.
# Part Name # Part Name
MT62F512M32D2DR-031 WT:B
H9JCNNNBK3MLYR-N6E
K3LKBKB0BM-MGCP
H9JCNNNCP3MLYR-N6E