Replace includes of build.h with version.h

As build.h is an auto-generated file it was necessary to add it as
an explicit prerequisite in the Makefiles. When this was forgotten
abuild would sometimes fail with following error:

   fatal error: build.h: No such file or directory

Fix this error by compiling version.c into all stages.

Change-Id: I342f341077cc7496aed279b00baaa957aa2af0db
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7510
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

src/arch/x86/boot/Makefile.inc

@@ -19,6 +19,4 @@ ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen.c
 ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
 
-$(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h
+endif # CONFIG_ARCH_RAMSTAGE_X86_32
-
-endif # CONFIG_ARCH_RAMSTAGE_X86_32

src/arch/x86/boot/smbios.c

@@ -23,7 +23,7 @@
 #include <string.h>
 #include <smbios.h>
 #include <console/console.h>
-#include <build.h>
+#include <version.h>
 #include <device/device.h>
 #include <arch/cpu.h>
 #include <cpu/x86/name.h>
@@ -123,7 +123,7 @@ const char *__attribute__((weak)) smbios_mainboard_bios_version(void)
 	if (strlen(CONFIG_LOCALVERSION))
 		return CONFIG_LOCALVERSION;
 	else
-		return COREBOOT_VERSION;
+		return coreboot_version;
 }
 
 static int smbios_write_type0(unsigned long *current, int handle)
@@ -138,13 +138,13 @@ static int smbios_write_type0(unsigned long *current, int handle)
 
 	t->vendor = smbios_add_string(t->eos, "coreboot");
 #if !CONFIG_CHROMEOS
-	t->bios_release_date = smbios_add_string(t->eos, COREBOOT_DMI_DATE);
+	t->bios_release_date = smbios_add_string(t->eos, coreboot_dmi_date);
 
 	t->bios_version = smbios_add_string(t->eos, smbios_mainboard_bios_version());
 #else
 #define SPACES \
 	"                                                                  "
-	t->bios_release_date = smbios_add_string(t->eos, COREBOOT_DMI_DATE);
+	t->bios_release_date = smbios_add_string(t->eos, coreboot_dmi_date);
 	u32 version_offset = (u32)smbios_string_table_len(t->eos);
 	t->bios_version = smbios_add_string(t->eos, SPACES);
 	/* SMBIOS offsets start at 1 rather than 0 */

src/console/Makefile.inc

@@ -14,8 +14,3 @@ romstage-y += die.c
 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += vtxprintf.c printk.c
 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += init.c console.c
 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += die.c
-
-$(obj)/console/init.smm.o : $(obj)/build.h
-$(obj)/console/init.ramstage.o : $(obj)/build.h
-$(obj)/console/init.romstage.o : $(obj)/build.h
-$(obj)/console/init.bootblock.o : $(obj)/build.h

src/console/init.c

@@ -19,12 +19,12 @@
  * MA 02110-1301 USA
  */
 
-#include <build.h>
 #include <console/console.h>
 #include <console/uart.h>
 #include <console/streams.h>
 #include <device/pci.h>
 #include <option.h>
+#include <version.h>
 
 /* While in romstage, console loglevel is built-time constant. */
 static ROMSTAGE_CONST int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
@@ -48,14 +48,7 @@ void console_init(void)
 	console_hw_init();
 
 #if defined(__PRE_RAM__)
-	static const char console_test[] =
+	printk(BIOS_INFO, "\n\ncoreboot-%s%s %s starting...\n",
-		"\n\ncoreboot-"
+		      coreboot_version, coreboot_extra_version, coreboot_build);
-		COREBOOT_VERSION
-		COREBOOT_EXTRA_VERSION
-		" "
-		COREBOOT_BUILD
-		" starting...\n";
-
-	print_info(console_test);
 #endif
 }

src/drivers/pc80/Makefile.inc

@@ -18,6 +18,3 @@ cmos.default-file = $(CONFIG_CMOS_DEFAULT_FILE):nvramtool
 cmos.default-type = 0xaa
 
 smm-y += mc146818rtc.c
-
-$(obj)/drivers/pc80/mc146818rtc.ramstage.o : $(obj)/build.h
-$(obj)/drivers/pc80/mc146818rtc.smm.o : $(obj)/build.h

src/drivers/pc80/mc146818rtc.c

@@ -1,5 +1,5 @@
 #include <stdint.h>
-#include <build.h>
+#include <version.h>
 #include <console/console.h>
 #include <pc80/mc146818rtc.h>
 #include <boot/coreboot_tables.h>
@@ -17,11 +17,12 @@ static void cmos_update_date(u8 has_century)
 	cmos_write(0, RTC_CLK_SECOND);
 	cmos_write(0, RTC_CLK_MINUTE);
 	cmos_write(1, RTC_CLK_HOUR);
-	cmos_write(COREBOOT_BUILD_WEEKDAY_BCD + 1, RTC_CLK_DAYOFWEEK);
+	cmos_write(coreboot_build_date.weekday + 1, RTC_CLK_DAYOFWEEK);
-	cmos_write(COREBOOT_BUILD_DAY_BCD, RTC_CLK_DAYOFMONTH);
+	cmos_write(coreboot_build_date.day, RTC_CLK_DAYOFMONTH);
-	cmos_write(COREBOOT_BUILD_MONTH_BCD, RTC_CLK_MONTH);
+	cmos_write(coreboot_build_date.month, RTC_CLK_MONTH);
-	cmos_write(COREBOOT_BUILD_YEAR_BCD, RTC_CLK_YEAR);
+	cmos_write(coreboot_build_date.year, RTC_CLK_YEAR);
-	if (has_century) cmos_write(0x20, RTC_CLK_ALTCENTURY);
+	if (has_century)
+		cmos_write(coreboot_build_date.century, RTC_CLK_ALTCENTURY);
 }
 
 #if CONFIG_USE_OPTION_TABLE

src/include/device/azalia_device.h

@@ -26,7 +26,6 @@
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>
-#include <build.h>
 
 #include <device/device.h>
 

src/include/string.h

@@ -56,6 +56,16 @@ static inline char *strdup(const char *s)
 	memcpy(d, s, sz);
 	return d;
 }
+
+static inline char *strconcat(const char *s1, const char *s2)
+{
+	size_t sz_1 = strlen(s1);
+	size_t sz_2 = strlen(s2);
+	char *d = malloc(sz_1 + sz_2 + 1);
+	memcpy(d, s1, sz_1);
+	memcpy(d + sz_1, s2, sz_2 + 1);
+	return d;
+}
 #endif
 
 static inline char *strncpy(char *to, const char *from, int count)

src/include/version.h

@@ -15,5 +15,16 @@ extern const char coreboot_compile_time[];
 extern const char coreboot_compile_by[];
 extern const char coreboot_compile_host[];
 extern const char coreboot_compile_domain[];
+extern const char coreboot_dmi_date[];
+
+struct bcd_date {
+	unsigned char century;
+	unsigned char year;
+	unsigned char month;
+	unsigned char day;
+	unsigned char weekday;
+};
+
+extern const struct bcd_date coreboot_build_date;
 
 #endif /* VERSION_H */

src/lib/Makefile.inc

@@ -54,7 +54,6 @@ smm-$(CONFIG_SMM_TSEG) += malloc.c
 ramstage-y += delay.c
 ramstage-y += fallback_boot.c
 ramstage-y += compute_ip_checksum.c
-ramstage-y += version.c
 ramstage-y += cbfs.c cbfs_core.c
 ramstage-y += lzma.c lzmadecode.c
 ramstage-y += stack.c
@@ -92,7 +91,15 @@ romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += ramstage_cache.c
 smm-y += cbfs.c cbfs_core.c memcmp.c
 smm-$(CONFIG_COMPILER_GCC) += gcc.c
 
+bootblock-y += version.c
+romstage-y += version.c
+ramstage-y += version.c
+smm-y += version.c
+
+$(obj)/lib/version.bootblock.o : $(obj)/build.h
+$(obj)/lib/version.romstage.o : $(obj)/build.h
 $(obj)/lib/version.ramstage.o : $(obj)/build.h
+$(obj)/lib/version.smm.o : $(obj)/build.h
 
 romstage-y += bootmode.c
 ramstage-y += bootmode.c

src/lib/version.c

@@ -40,3 +40,13 @@ const char coreboot_compile_time[]   = COREBOOT_COMPILE_TIME;
 const char coreboot_compile_by[]     = COREBOOT_COMPILE_BY;
 const char coreboot_compile_host[]   = COREBOOT_COMPILE_HOST;
 const char coreboot_compile_domain[] = COREBOOT_COMPILE_DOMAIN;
+
+const char coreboot_dmi_date[]       = COREBOOT_DMI_DATE;
+
+const struct bcd_date coreboot_build_date = {
+	.century = 0x20,
+	.year = COREBOOT_BUILD_YEAR_BCD,
+	.month = COREBOOT_BUILD_MONTH_BCD,
+	.day = COREBOOT_BUILD_DAY_BCD,
+	.weekday = COREBOOT_BUILD_WEEKDAY_BCD,
+};

src/mainboard/lenovo/t60/mainboard.c

@@ -36,7 +36,7 @@
 #include <arch/x86/include/arch/acpigen.h>
 #include <arch/interrupt.h>
 #include <smbios.h>
-#include <build.h>
+#include <version.h>
 #include <drivers/intel/gma/int15.h>
 #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
 
@@ -54,11 +54,16 @@ int get_cst_entries(acpi_cstate_t **entries)
 
 const char *smbios_mainboard_bios_version(void)
 {
+	static char *s = NULL;
+
 	/* Satisfy thinkpad_acpi.  */
 	if (strlen(CONFIG_LOCALVERSION))
 		return "CBET4000 " CONFIG_LOCALVERSION;
-	else
+
-		return "CBET4000 " COREBOOT_VERSION;
+	if (s != NULL)
+		return s;
+	s = strconcat("CBET4000 ", coreboot_version);
+	return s;
 }
 
 static void mainboard_init(device_t dev)

src/mainboard/lenovo/x200/mainboard.c

@@ -27,7 +27,7 @@
 #include <ec/acpi/ec.h>
 #include <smbios.h>
 #include <string.h>
-#include <build.h>
+#include <version.h>
 #include <ec/lenovo/pmh7/pmh7.h>
 #include <ec/acpi/ec.h>
 #include <ec/lenovo/h8/h8.h>
@@ -37,11 +37,16 @@
 
 const char *smbios_mainboard_bios_version(void)
 {
+	static char *s = NULL;
+
 	/* Satisfy thinkpad_acpi.  */
 	if (strlen(CONFIG_LOCALVERSION))
 		return "CBET4000 " CONFIG_LOCALVERSION;
-	else
+
-		return "CBET4000 " COREBOOT_VERSION;
+	if (s != NULL)
+		return s;
+	s = strconcat("CBET4000 ", coreboot_version);
+	return s;
 }
 
 static void mainboard_init(device_t dev)

src/mainboard/lenovo/x201/mainboard.c

@@ -45,7 +45,7 @@
 #include <cpu/x86/lapic.h>
 #include <device/pci.h>
 #include <smbios.h>
-#include <build.h>
+#include <version.h>
 #include "drivers/lenovo/lenovo.h"
 
 static acpi_cstate_t cst_entries[] = {
@@ -62,11 +62,16 @@ int get_cst_entries(acpi_cstate_t ** entries)
 
 const char *smbios_mainboard_bios_version(void)
 {
+	static char *s = NULL;
+
 	/* Satisfy thinkpad_acpi.  */
 	if (strlen(CONFIG_LOCALVERSION))
 		return "CBET4000 " CONFIG_LOCALVERSION;
-	else
+
-		return "CBET4000 " COREBOOT_VERSION;
+	if (s != NULL)
+		return s;
+	s = strconcat("CBET4000 ", coreboot_version);
+	return s;
 }
 
 

src/mainboard/lenovo/x220/mainboard.c

@@ -32,7 +32,7 @@
 #include <device/pci.h>
 #include <pc80/keyboard.h>
 #include <ec/lenovo/h8/h8.h>
-#include <build.h>
+#include <version.h>
 
 void mainboard_suspend_resume(void)
 {
@@ -42,11 +42,16 @@ void mainboard_suspend_resume(void)
 
 const char *smbios_mainboard_bios_version(void)
 {
+	static char *s = NULL;
+
 	/* Satisfy thinkpad_acpi.  */
 	if (strlen(CONFIG_LOCALVERSION))
 		return "CBET4000 " CONFIG_LOCALVERSION;
-	else
+
-		return "CBET4000 " COREBOOT_VERSION;
+	if (s != NULL)
+		return s;
+	s = strconcat("CBET4000 ", coreboot_version);
+	return s;
 }
 
 static void mainboard_init(device_t dev)

src/mainboard/lenovo/x230/mainboard.c

@@ -33,7 +33,7 @@
 #include <device/pci.h>
 #include <pc80/keyboard.h>
 #include <ec/lenovo/h8/h8.h>
-#include <build.h>
+#include <version.h>
 
 void mainboard_suspend_resume(void)
 {
@@ -43,11 +43,16 @@ void mainboard_suspend_resume(void)
 
 const char *smbios_mainboard_bios_version(void)
 {
+	static char *s = NULL;
+
 	/* Satisfy thinkpad_acpi.  */
 	if (strlen(CONFIG_LOCALVERSION))
 		return "CBET4000 " CONFIG_LOCALVERSION;
-	else
+
-		return "CBET4000 " COREBOOT_VERSION;
+	if (s != NULL)
+		return s;
+	s = strconcat("CBET4000 ", coreboot_version);
+	return s;
 }
 
 static void mainboard_init(device_t dev)

src/mainboard/lenovo/x60/mainboard.c

@@ -38,7 +38,7 @@
 #include "dock.h"
 #include <arch/x86/include/arch/acpigen.h>
 #include <smbios.h>
-#include <build.h>
+#include <version.h>
 #include <drivers/intel/gma/int15.h>
 #include "drivers/lenovo/lenovo.h"
 
@@ -103,11 +103,16 @@ static void mainboard_init(device_t dev)
 
 const char *smbios_mainboard_bios_version(void)
 {
+	static char *s = NULL;
+
 	/* Satisfy thinkpad_acpi.  */
 	if (strlen(CONFIG_LOCALVERSION))
 		return "CBET4000 " CONFIG_LOCALVERSION;
-	else
+
-		return "CBET4000 " COREBOOT_VERSION;
+	if (s != NULL)
+		return s;
+	s = strconcat("CBET4000 ", coreboot_version);
+	return s;
 }
 
 static void fill_ssdt(void)

src/northbridge/intel/fsp_rangeley/Makefile.inc

@@ -36,4 +36,3 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)
 CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_rangeley/
 CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_rangeley/fsp
 
-$(obj)/northbridge/intel/fsp_rangeley/acpi.ramstage.o : $(obj)/build.h

src/northbridge/intel/fsp_rangeley/acpi.c

@@ -29,7 +29,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <build.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include "northbridge.h"

src/northbridge/intel/fsp_sandybridge/Makefile.inc

@@ -34,4 +34,3 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
 
 CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_sandybridge/fsp
 
-$(obj)/northbridge/intel/fsp_sandybridge/acpi.ramstage.o : $(obj)/build.h

src/northbridge/intel/fsp_sandybridge/acpi.c

@@ -28,7 +28,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <build.h>
 #include <drivers/intel/gma/i915.h>
 #include <arch/acpigen.h>
 #include "northbridge.h"

src/northbridge/intel/haswell/Makefile.inc

@@ -40,4 +40,3 @@ mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
 mrc.bin-position := 0xfffa0000
 mrc.bin-type := 0xab
 
-$(obj)/northbridge/intel/haswell/acpi.ramstage.o : $(obj)/build.h

src/northbridge/intel/haswell/acpi.c

@@ -28,7 +28,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <build.h>
 #include "haswell.h"
 #include <cbmem.h>
 #include <arch/acpigen.h>

src/northbridge/intel/nehalem/Makefile.inc

@@ -42,4 +42,3 @@ mrc.cache-file := $(obj)/mrc.cache
 mrc.cache-position := 0xfffe0000
 mrc.cache-type := 0xac
 
-$(obj)/northbridge/intel/nehalem/acpi.ramstage.o : $(obj)/build.h

src/northbridge/intel/nehalem/acpi.c

@@ -32,7 +32,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <drivers/intel/gma/intel_bios.h>
-#include <build.h>
 #include <arch/acpigen.h>
 #include <cpu/cpu.h>
 #include <drivers/intel/gma/i915.h>

src/northbridge/intel/sandybridge/Makefile.inc

@@ -65,4 +65,3 @@ mrc.cache-position := $(mrc-cache-position-y)
 mrc.cache-type := 0xac
 endif
 
-$(obj)/northbridge/intel/sandybridge/acpi.ramstage.o : $(obj)/build.h

src/northbridge/intel/sandybridge/acpi.c

@@ -28,7 +28,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <build.h>
 #include <drivers/intel/gma/i915.h>
 #include <arch/acpigen.h>
 #include "sandybridge.h"

src/soc/intel/fsp_baytrail/romstage/Makefile.inc

@@ -22,5 +22,3 @@ romstage-y += romstage.c
 romstage-y += pmc.c
 romstage-y += report_platform.c
 romstage-$(CONFIG_ENABLE_BUILTIN_COM1) += uart.c
-
-$(obj)/soc/intel/fsp_baytrail/romstage/romstage.romstage.o : $(obj)/build.h

src/soc/intel/fsp_baytrail/romstage/romstage.c

@@ -40,7 +40,7 @@
 #include <drivers/intel/fsp/fsp_util.h>
 #include <baytrail/pmc.h>
 #include <baytrail/spi.h>
-#include <build.h>
+#include <version.h>
 #include <pc80/mc146818rtc.h>
 #include <device/pci_def.h>
 #include <console/cbmem_console.h>
@@ -142,11 +142,8 @@ static void baytrail_rtc_init(void)
 
 	if (rtc_failed) {
 		printk(BIOS_DEBUG,
-			"RTC Failure detected.  Resetting Date to %x/%x/%x%x\n",
+			"RTC Failure detected.  Resetting Date to %s\n",
-			COREBOOT_BUILD_MONTH_BCD,
+			coreboot_dmi_date);
-			COREBOOT_BUILD_DAY_BCD,
-			0x20,
-			COREBOOT_BUILD_YEAR_BCD);
 
 		write32(DEFAULT_PBASE + GEN_PMCON1, gen_pmcon1 & ~RPS);
 	}

src/southbridge/intel/fsp_rangeley/Makefile.inc

@@ -37,7 +37,6 @@ romstage-y += romstage.c
 romstage-$(CONFIG_USBDEBUG) += usb_debug.c
 ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
 
-$(obj)/southbridge/intel/fsp_rangeley/early_init.romstage.o : $(obj)/build.h
 
 ifeq ($(CONFIG_INCLUDE_ME),y)
 INTERMEDIATE+=rangeley_add_descriptor

src/southbridge/intel/fsp_rangeley/early_init.c

@@ -25,7 +25,7 @@
 #include <arch/io.h>
 #include <device/pci_def.h>
 #include <pc80/mc146818rtc.h>
-#include <build.h>
+#include <version.h>
 #include <device/pci_def.h>
 #include "pci_devs.h"
 #include "soc.h"
@@ -59,11 +59,8 @@ static void reset_rtc(void)
 
 	if (rtc_failed) {
 		printk(BIOS_DEBUG,
-			"RTC Failure detected.  Resetting Date to %x/%x/%x%x\n",
+			"RTC Failure detected.  Resetting Date to %s\n",
-			COREBOOT_BUILD_MONTH_BCD,
+			coreboot_dmi_date);
-			COREBOOT_BUILD_DAY_BCD,
-			0x20,
-			COREBOOT_BUILD_YEAR_BCD);
 
 		/* Clear the power failure flag */
 		write32(DEFAULT_PBASE + GEN_PMCON1, gen_pmcon1 & ~RPS);