Replace includes of build.h with version.h
As build.h is an auto-generated file it was necessary to add it as an explicit prerequisite in the Makefiles. When this was forgotten abuild would sometimes fail with following error: fatal error: build.h: No such file or directory Fix this error by compiling version.c into all stages. Change-Id: I342f341077cc7496aed279b00baaa957aa2af0db Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7510 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Kyösti Mälkki
parent
339064a0bf
commit
c36af7b00a
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@ -19,6 +19,4 @@ ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen.c
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ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
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$(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h
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endif # CONFIG_ARCH_RAMSTAGE_X86_32
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endif # CONFIG_ARCH_RAMSTAGE_X86_32
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@ -23,7 +23,7 @@
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#include <string.h>
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#include <smbios.h>
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#include <console/console.h>
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#include <build.h>
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#include <version.h>
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#include <device/device.h>
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#include <arch/cpu.h>
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#include <cpu/x86/name.h>
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@ -123,7 +123,7 @@ const char *__attribute__((weak)) smbios_mainboard_bios_version(void)
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if (strlen(CONFIG_LOCALVERSION))
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return CONFIG_LOCALVERSION;
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else
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return COREBOOT_VERSION;
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return coreboot_version;
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}
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static int smbios_write_type0(unsigned long *current, int handle)
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@ -138,13 +138,13 @@ static int smbios_write_type0(unsigned long *current, int handle)
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t->vendor = smbios_add_string(t->eos, "coreboot");
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#if !CONFIG_CHROMEOS
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t->bios_release_date = smbios_add_string(t->eos, COREBOOT_DMI_DATE);
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t->bios_release_date = smbios_add_string(t->eos, coreboot_dmi_date);
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t->bios_version = smbios_add_string(t->eos, smbios_mainboard_bios_version());
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#else
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#define SPACES \
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" "
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t->bios_release_date = smbios_add_string(t->eos, COREBOOT_DMI_DATE);
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t->bios_release_date = smbios_add_string(t->eos, coreboot_dmi_date);
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u32 version_offset = (u32)smbios_string_table_len(t->eos);
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t->bios_version = smbios_add_string(t->eos, SPACES);
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/* SMBIOS offsets start at 1 rather than 0 */
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@ -14,8 +14,3 @@ romstage-y += die.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += vtxprintf.c printk.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += init.c console.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += die.c
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$(obj)/console/init.smm.o : $(obj)/build.h
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$(obj)/console/init.ramstage.o : $(obj)/build.h
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$(obj)/console/init.romstage.o : $(obj)/build.h
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$(obj)/console/init.bootblock.o : $(obj)/build.h
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@ -19,12 +19,12 @@
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* MA 02110-1301 USA
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*/
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#include <build.h>
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#include <console/console.h>
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#include <console/uart.h>
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#include <console/streams.h>
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#include <device/pci.h>
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#include <option.h>
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#include <version.h>
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/* While in romstage, console loglevel is built-time constant. */
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static ROMSTAGE_CONST int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
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@ -48,14 +48,7 @@ void console_init(void)
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console_hw_init();
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#if defined(__PRE_RAM__)
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static const char console_test[] =
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"\n\ncoreboot-"
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COREBOOT_VERSION
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COREBOOT_EXTRA_VERSION
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" "
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COREBOOT_BUILD
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" starting...\n";
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print_info(console_test);
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printk(BIOS_INFO, "\n\ncoreboot-%s%s %s starting...\n",
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coreboot_version, coreboot_extra_version, coreboot_build);
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#endif
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}
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@ -18,6 +18,3 @@ cmos.default-file = $(CONFIG_CMOS_DEFAULT_FILE):nvramtool
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cmos.default-type = 0xaa
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smm-y += mc146818rtc.c
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$(obj)/drivers/pc80/mc146818rtc.ramstage.o : $(obj)/build.h
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$(obj)/drivers/pc80/mc146818rtc.smm.o : $(obj)/build.h
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@ -1,5 +1,5 @@
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#include <stdint.h>
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#include <build.h>
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#include <version.h>
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#include <console/console.h>
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#include <pc80/mc146818rtc.h>
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#include <boot/coreboot_tables.h>
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@ -17,11 +17,12 @@ static void cmos_update_date(u8 has_century)
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cmos_write(0, RTC_CLK_SECOND);
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cmos_write(0, RTC_CLK_MINUTE);
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cmos_write(1, RTC_CLK_HOUR);
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cmos_write(COREBOOT_BUILD_WEEKDAY_BCD + 1, RTC_CLK_DAYOFWEEK);
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cmos_write(COREBOOT_BUILD_DAY_BCD, RTC_CLK_DAYOFMONTH);
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cmos_write(COREBOOT_BUILD_MONTH_BCD, RTC_CLK_MONTH);
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cmos_write(COREBOOT_BUILD_YEAR_BCD, RTC_CLK_YEAR);
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if (has_century) cmos_write(0x20, RTC_CLK_ALTCENTURY);
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cmos_write(coreboot_build_date.weekday + 1, RTC_CLK_DAYOFWEEK);
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cmos_write(coreboot_build_date.day, RTC_CLK_DAYOFMONTH);
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cmos_write(coreboot_build_date.month, RTC_CLK_MONTH);
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cmos_write(coreboot_build_date.year, RTC_CLK_YEAR);
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if (has_century)
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cmos_write(coreboot_build_date.century, RTC_CLK_ALTCENTURY);
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}
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#if CONFIG_USE_OPTION_TABLE
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@ -26,7 +26,6 @@
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/interrupt.h>
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#include <build.h>
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#include <device/device.h>
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@ -56,6 +56,16 @@ static inline char *strdup(const char *s)
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memcpy(d, s, sz);
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return d;
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}
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static inline char *strconcat(const char *s1, const char *s2)
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{
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size_t sz_1 = strlen(s1);
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size_t sz_2 = strlen(s2);
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char *d = malloc(sz_1 + sz_2 + 1);
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memcpy(d, s1, sz_1);
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memcpy(d + sz_1, s2, sz_2 + 1);
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return d;
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}
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#endif
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static inline char *strncpy(char *to, const char *from, int count)
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@ -15,5 +15,16 @@ extern const char coreboot_compile_time[];
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extern const char coreboot_compile_by[];
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extern const char coreboot_compile_host[];
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extern const char coreboot_compile_domain[];
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extern const char coreboot_dmi_date[];
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struct bcd_date {
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unsigned char century;
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unsigned char year;
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unsigned char month;
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unsigned char day;
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unsigned char weekday;
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};
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extern const struct bcd_date coreboot_build_date;
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#endif /* VERSION_H */
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@ -54,7 +54,6 @@ smm-$(CONFIG_SMM_TSEG) += malloc.c
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ramstage-y += delay.c
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ramstage-y += fallback_boot.c
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ramstage-y += compute_ip_checksum.c
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ramstage-y += version.c
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ramstage-y += cbfs.c cbfs_core.c
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ramstage-y += lzma.c lzmadecode.c
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ramstage-y += stack.c
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@ -92,7 +91,15 @@ romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += ramstage_cache.c
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smm-y += cbfs.c cbfs_core.c memcmp.c
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smm-$(CONFIG_COMPILER_GCC) += gcc.c
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bootblock-y += version.c
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romstage-y += version.c
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ramstage-y += version.c
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smm-y += version.c
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$(obj)/lib/version.bootblock.o : $(obj)/build.h
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$(obj)/lib/version.romstage.o : $(obj)/build.h
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$(obj)/lib/version.ramstage.o : $(obj)/build.h
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$(obj)/lib/version.smm.o : $(obj)/build.h
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romstage-y += bootmode.c
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ramstage-y += bootmode.c
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@ -40,3 +40,13 @@ const char coreboot_compile_time[] = COREBOOT_COMPILE_TIME;
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const char coreboot_compile_by[] = COREBOOT_COMPILE_BY;
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const char coreboot_compile_host[] = COREBOOT_COMPILE_HOST;
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const char coreboot_compile_domain[] = COREBOOT_COMPILE_DOMAIN;
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const char coreboot_dmi_date[] = COREBOOT_DMI_DATE;
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const struct bcd_date coreboot_build_date = {
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.century = 0x20,
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.year = COREBOOT_BUILD_YEAR_BCD,
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.month = COREBOOT_BUILD_MONTH_BCD,
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.day = COREBOOT_BUILD_DAY_BCD,
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.weekday = COREBOOT_BUILD_WEEKDAY_BCD,
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};
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@ -36,7 +36,7 @@
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#include <arch/x86/include/arch/acpigen.h>
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#include <arch/interrupt.h>
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#include <smbios.h>
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#include <build.h>
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#include <version.h>
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#include <drivers/intel/gma/int15.h>
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#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
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@ -54,11 +54,16 @@ int get_cst_entries(acpi_cstate_t **entries)
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const char *smbios_mainboard_bios_version(void)
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{
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static char *s = NULL;
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/* Satisfy thinkpad_acpi. */
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if (strlen(CONFIG_LOCALVERSION))
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return "CBET4000 " CONFIG_LOCALVERSION;
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else
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return "CBET4000 " COREBOOT_VERSION;
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if (s != NULL)
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return s;
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s = strconcat("CBET4000 ", coreboot_version);
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return s;
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}
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static void mainboard_init(device_t dev)
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@ -27,7 +27,7 @@
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#include <ec/acpi/ec.h>
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#include <smbios.h>
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#include <string.h>
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#include <build.h>
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#include <version.h>
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#include <ec/lenovo/pmh7/pmh7.h>
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#include <ec/acpi/ec.h>
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#include <ec/lenovo/h8/h8.h>
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@ -37,11 +37,16 @@
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const char *smbios_mainboard_bios_version(void)
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{
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static char *s = NULL;
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/* Satisfy thinkpad_acpi. */
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if (strlen(CONFIG_LOCALVERSION))
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return "CBET4000 " CONFIG_LOCALVERSION;
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else
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return "CBET4000 " COREBOOT_VERSION;
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if (s != NULL)
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return s;
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s = strconcat("CBET4000 ", coreboot_version);
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return s;
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}
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static void mainboard_init(device_t dev)
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@ -45,7 +45,7 @@
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#include <cpu/x86/lapic.h>
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#include <device/pci.h>
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#include <smbios.h>
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#include <build.h>
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#include <version.h>
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#include "drivers/lenovo/lenovo.h"
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static acpi_cstate_t cst_entries[] = {
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@ -62,11 +62,16 @@ int get_cst_entries(acpi_cstate_t ** entries)
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const char *smbios_mainboard_bios_version(void)
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{
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static char *s = NULL;
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/* Satisfy thinkpad_acpi. */
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if (strlen(CONFIG_LOCALVERSION))
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return "CBET4000 " CONFIG_LOCALVERSION;
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else
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return "CBET4000 " COREBOOT_VERSION;
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if (s != NULL)
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return s;
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s = strconcat("CBET4000 ", coreboot_version);
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return s;
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}
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@ -32,7 +32,7 @@
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#include <device/pci.h>
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#include <pc80/keyboard.h>
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#include <ec/lenovo/h8/h8.h>
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#include <build.h>
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#include <version.h>
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void mainboard_suspend_resume(void)
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{
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@ -42,11 +42,16 @@ void mainboard_suspend_resume(void)
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const char *smbios_mainboard_bios_version(void)
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{
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static char *s = NULL;
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/* Satisfy thinkpad_acpi. */
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if (strlen(CONFIG_LOCALVERSION))
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return "CBET4000 " CONFIG_LOCALVERSION;
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else
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return "CBET4000 " COREBOOT_VERSION;
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if (s != NULL)
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return s;
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s = strconcat("CBET4000 ", coreboot_version);
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return s;
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}
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static void mainboard_init(device_t dev)
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@ -33,7 +33,7 @@
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#include <device/pci.h>
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#include <pc80/keyboard.h>
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#include <ec/lenovo/h8/h8.h>
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#include <build.h>
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#include <version.h>
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void mainboard_suspend_resume(void)
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{
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@ -43,11 +43,16 @@ void mainboard_suspend_resume(void)
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const char *smbios_mainboard_bios_version(void)
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{
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static char *s = NULL;
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/* Satisfy thinkpad_acpi. */
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if (strlen(CONFIG_LOCALVERSION))
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return "CBET4000 " CONFIG_LOCALVERSION;
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else
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return "CBET4000 " COREBOOT_VERSION;
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if (s != NULL)
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return s;
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s = strconcat("CBET4000 ", coreboot_version);
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return s;
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}
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static void mainboard_init(device_t dev)
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@ -38,7 +38,7 @@
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#include "dock.h"
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#include <arch/x86/include/arch/acpigen.h>
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#include <smbios.h>
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#include <build.h>
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#include <version.h>
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#include <drivers/intel/gma/int15.h>
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#include "drivers/lenovo/lenovo.h"
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@ -103,11 +103,16 @@ static void mainboard_init(device_t dev)
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const char *smbios_mainboard_bios_version(void)
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{
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static char *s = NULL;
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/* Satisfy thinkpad_acpi. */
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if (strlen(CONFIG_LOCALVERSION))
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return "CBET4000 " CONFIG_LOCALVERSION;
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else
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return "CBET4000 " COREBOOT_VERSION;
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if (s != NULL)
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return s;
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s = strconcat("CBET4000 ", coreboot_version);
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return s;
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}
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static void fill_ssdt(void)
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@ -36,4 +36,3 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)
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CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_rangeley/
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CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_rangeley/fsp
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$(obj)/northbridge/intel/fsp_rangeley/acpi.ramstage.o : $(obj)/build.h
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@ -29,7 +29,6 @@
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <build.h>
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#include <arch/acpi.h>
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#include <arch/acpigen.h>
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#include "northbridge.h"
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@ -34,4 +34,3 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
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CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_sandybridge/fsp
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$(obj)/northbridge/intel/fsp_sandybridge/acpi.ramstage.o : $(obj)/build.h
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@ -28,7 +28,6 @@
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <build.h>
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#include <drivers/intel/gma/i915.h>
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#include <arch/acpigen.h>
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#include "northbridge.h"
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@ -40,4 +40,3 @@ mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
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mrc.bin-position := 0xfffa0000
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mrc.bin-type := 0xab
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$(obj)/northbridge/intel/haswell/acpi.ramstage.o : $(obj)/build.h
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@ -28,7 +28,6 @@
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#include <device/device.h>
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#include <device/pci.h>
|
||||
#include <device/pci_ids.h>
|
||||
#include <build.h>
|
||||
#include "haswell.h"
|
||||
#include <cbmem.h>
|
||||
#include <arch/acpigen.h>
|
||||
|
|
|
|||
|
|
@ -42,4 +42,3 @@ mrc.cache-file := $(obj)/mrc.cache
|
|||
mrc.cache-position := 0xfffe0000
|
||||
mrc.cache-type := 0xac
|
||||
|
||||
$(obj)/northbridge/intel/nehalem/acpi.ramstage.o : $(obj)/build.h
|
||||
|
|
|
|||
|
|
@ -32,7 +32,6 @@
|
|||
#include <device/pci.h>
|
||||
#include <device/pci_ids.h>
|
||||
#include <drivers/intel/gma/intel_bios.h>
|
||||
#include <build.h>
|
||||
#include <arch/acpigen.h>
|
||||
#include <cpu/cpu.h>
|
||||
#include <drivers/intel/gma/i915.h>
|
||||
|
|
|
|||
|
|
@ -65,4 +65,3 @@ mrc.cache-position := $(mrc-cache-position-y)
|
|||
mrc.cache-type := 0xac
|
||||
endif
|
||||
|
||||
$(obj)/northbridge/intel/sandybridge/acpi.ramstage.o : $(obj)/build.h
|
||||
|
|
|
|||
|
|
@ -28,7 +28,6 @@
|
|||
#include <device/device.h>
|
||||
#include <device/pci.h>
|
||||
#include <device/pci_ids.h>
|
||||
#include <build.h>
|
||||
#include <drivers/intel/gma/i915.h>
|
||||
#include <arch/acpigen.h>
|
||||
#include "sandybridge.h"
|
||||
|
|
|
|||
|
|
@ -22,5 +22,3 @@ romstage-y += romstage.c
|
|||
romstage-y += pmc.c
|
||||
romstage-y += report_platform.c
|
||||
romstage-$(CONFIG_ENABLE_BUILTIN_COM1) += uart.c
|
||||
|
||||
$(obj)/soc/intel/fsp_baytrail/romstage/romstage.romstage.o : $(obj)/build.h
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
#include <drivers/intel/fsp/fsp_util.h>
|
||||
#include <baytrail/pmc.h>
|
||||
#include <baytrail/spi.h>
|
||||
#include <build.h>
|
||||
#include <version.h>
|
||||
#include <pc80/mc146818rtc.h>
|
||||
#include <device/pci_def.h>
|
||||
#include <console/cbmem_console.h>
|
||||
|
|
@ -142,11 +142,8 @@ static void baytrail_rtc_init(void)
|
|||
|
||||
if (rtc_failed) {
|
||||
printk(BIOS_DEBUG,
|
||||
"RTC Failure detected. Resetting Date to %x/%x/%x%x\n",
|
||||
COREBOOT_BUILD_MONTH_BCD,
|
||||
COREBOOT_BUILD_DAY_BCD,
|
||||
0x20,
|
||||
COREBOOT_BUILD_YEAR_BCD);
|
||||
"RTC Failure detected. Resetting Date to %s\n",
|
||||
coreboot_dmi_date);
|
||||
|
||||
write32(DEFAULT_PBASE + GEN_PMCON1, gen_pmcon1 & ~RPS);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,7 +37,6 @@ romstage-y += romstage.c
|
|||
romstage-$(CONFIG_USBDEBUG) += usb_debug.c
|
||||
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
|
||||
|
||||
$(obj)/southbridge/intel/fsp_rangeley/early_init.romstage.o : $(obj)/build.h
|
||||
|
||||
ifeq ($(CONFIG_INCLUDE_ME),y)
|
||||
INTERMEDIATE+=rangeley_add_descriptor
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
#include <arch/io.h>
|
||||
#include <device/pci_def.h>
|
||||
#include <pc80/mc146818rtc.h>
|
||||
#include <build.h>
|
||||
#include <version.h>
|
||||
#include <device/pci_def.h>
|
||||
#include "pci_devs.h"
|
||||
#include "soc.h"
|
||||
|
|
@ -59,11 +59,8 @@ static void reset_rtc(void)
|
|||
|
||||
if (rtc_failed) {
|
||||
printk(BIOS_DEBUG,
|
||||
"RTC Failure detected. Resetting Date to %x/%x/%x%x\n",
|
||||
COREBOOT_BUILD_MONTH_BCD,
|
||||
COREBOOT_BUILD_DAY_BCD,
|
||||
0x20,
|
||||
COREBOOT_BUILD_YEAR_BCD);
|
||||
"RTC Failure detected. Resetting Date to %s\n",
|
||||
coreboot_dmi_date);
|
||||
|
||||
/* Clear the power failure flag */
|
||||
write32(DEFAULT_PBASE + GEN_PMCON1, gen_pmcon1 & ~RPS);
|
||||
|
|
|
|||
Loading…
Reference in New Issue