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soc/mediatek/mt8192: devapc: update domain remap setting 

Update domain remap setting to prevent DSP (domain 4)
from accessing registers.

Change-Id: Iefa9e75db85482a6c016b8b423c0b05f97e585b1
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Nina Wu 2021-04-27 17:32:41 +08:00 committed by Patrick Georgi
parent ce38084db6
commit c37d7b979f
2 changed files with 54 additions and 15 deletions
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54
src/soc/mediatek/mt8192/devapc.c
View File

@ -19,29 +19,33 @@ static void infra_master_init(uintptr_t base)
/* /*
* Domain Remap: TINYSYS to non-EMI (3-bit to 4-bit) * Domain Remap: TINYSYS to non-EMI (3-bit to 4-bit)
* 1. SCP from 3 to 3 * 1. SCP from 3 to 3
* 2. others from XXX to 15 * 2. DSP from 4 to 4
* 3. others from XXX to 15
*/ */
SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0), SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
FOUR_BIT_DOM_REMAP_0, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_0, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_1, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_1, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_2, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_2, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_3, MAS_DOMAIN_3, FOUR_BIT_DOM_REMAP_3, MAS_DOMAIN_3,
FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_4,
FOUR_BIT_DOM_REMAP_5, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_5, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_6, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_6, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_7, MAS_DOMAIN_15); FOUR_BIT_DOM_REMAP_7, MAS_DOMAIN_15);
/* /*
* Domain Remap: MMSYS slave domain remap (4-bit to 2-bit) * Domain Remap: MMSYS slave domain remap (4-bit to 2-bit)
* 1. From domain 0 ~ 3 to domain 0 ~ 3 * 1. From domain 0 to domain 0 (no protection for all)
* 2. others from XXX to domain 0 * 2. From domain 1, 2, 4 to domain 1 (forbidden for all)
* 3. From domain 3 to domain 3
* 4. others from XXX to domain 0
*/ */
SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0), SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
TWO_BIT_DOM_REMAP_0, MAS_DOMAIN_0, TWO_BIT_DOM_REMAP_0, MAS_DOMAIN_0,
TWO_BIT_DOM_REMAP_1, MAS_DOMAIN_1, TWO_BIT_DOM_REMAP_1, MAS_DOMAIN_1,
TWO_BIT_DOM_REMAP_2, MAS_DOMAIN_2, TWO_BIT_DOM_REMAP_2, MAS_DOMAIN_1,
TWO_BIT_DOM_REMAP_3, MAS_DOMAIN_3); TWO_BIT_DOM_REMAP_3, MAS_DOMAIN_3,
TWO_BIT_DOM_REMAP_4, MAS_DOMAIN_1);
} }
@ -49,20 +53,48 @@ static void peri_master_init(uintptr_t base)
{ {
/* Domain */ /* Domain */
SET32_BITFIELDS(getreg(base, MAS_DOM_0), SPM_DOM, MAS_DOMAIN_2); SET32_BITFIELDS(getreg(base, MAS_DOM_0), SPM_DOM, MAS_DOMAIN_2);
/*
* Domain Remap: CONNSYS slave domain remap (4-bit to 2-bit)
* 1. From domain 0 to domain 0 (no protection for all)
* 2. From domain 1 ~ 4 to domain 1 (forbidden for all)
* 3. others from XXX to domain 0
*/
SET32_BITFIELDS(getreg(base, DOM_REMAP_1_0),
TWO_BIT_DOM_REMAP_0, MAS_DOMAIN_0,
TWO_BIT_DOM_REMAP_1, MAS_DOMAIN_1,
TWO_BIT_DOM_REMAP_2, MAS_DOMAIN_1,
TWO_BIT_DOM_REMAP_3, MAS_DOMAIN_1,
TWO_BIT_DOM_REMAP_4, MAS_DOMAIN_1);
/*
* Domain Remap: TINYSYS slave domain remap (4-bit to 3-bit)
* 1. From domain 0 to domain 0 (no protection for all)
* 2. From domain 1 ~ 4 to domain 1 (forbidden for all)
* 3. others from XXX to domain 0
*/
SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
THREE_BIT_DOM_REMAP_0, MAS_DOMAIN_0,
THREE_BIT_DOM_REMAP_1, MAS_DOMAIN_1,
THREE_BIT_DOM_REMAP_2, MAS_DOMAIN_1,
THREE_BIT_DOM_REMAP_3, MAS_DOMAIN_1,
THREE_BIT_DOM_REMAP_4, MAS_DOMAIN_1);
} }
static void fmem_master_init(uintptr_t base) static void fmem_master_init(uintptr_t base)
{ {
/* Domain Remap: TINYSYS to EMI (3-bit to 4-bit) /*
* 1. SCP from 3 to 3 * Domain Remap: TINYSYS to EMI (3-bit to 4-bit)
* 2. others from XXX to 15 * 1. SCP from 3 to 3
* 2. DSP from 4 to 4
* 3. others from XXX to 15
*/ */
SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0), SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
FOUR_BIT_DOM_REMAP_0, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_0, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_1, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_1, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_2, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_2, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_3, MAS_DOMAIN_3, FOUR_BIT_DOM_REMAP_3, MAS_DOMAIN_3,
FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_4,
FOUR_BIT_DOM_REMAP_5, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_5, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_6, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_6, MAS_DOMAIN_15,
FOUR_BIT_DOM_REMAP_7, MAS_DOMAIN_15); FOUR_BIT_DOM_REMAP_7, MAS_DOMAIN_15);

15
src/soc/mediatek/mt8192/include/soc/devapc.h
View File

@ -68,9 +68,16 @@ DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_5, 23, 20)
DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_6, 27, 24) DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_6, 27, 24)
DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_7, 31, 28) DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_7, 31, 28)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0) DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_0, 2, 0)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1, 3, 2) DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_1, 5, 3)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2, 5, 4) DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_2, 8, 6)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3, 7, 6) DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_3, 11, 9)
DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_4, 14, 12)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1, 3, 2)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2, 5, 4)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3, 7, 6)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_4, 9, 8)
#endif /* SOC_MEDIATEK_MT8192_DEVAPC_H */ #endif /* SOC_MEDIATEK_MT8192_DEVAPC_H */