From c38d92789901002faf6cd1c64c689d29ab269e2e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 21 Sep 2021 19:35:40 +0530 Subject: [PATCH] soc/intel/alderlake: Drop unused HECI_DISABLE_USING_SMM Kconfig Earlier generation platform used `HeciEnabled` chip config (set to 0) and HECI_DISABLE_USING_SMM Kconfig to make the CSE function disable at the end of the post. `HeciEnabled` chip config remains enabled in all latest generation platforms hence drop HECI_DISABLE_USING_SMM Kconfig selection from SoC Kconfig as CSE remains default enabled. BUG=b:200644229 TEST=No functional impact during boot as CSE (B:0, D:0x16, F:0) device is listed with `lspci`. Change-Id: I5278e5c2e015b91bb3df3a3c73a6c659a56794b5 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/57799 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Maulik V Vaghela Reviewed-by: Rizwan Qureshi --- src/soc/intel/alderlake/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index b87861b281..b135bbe95b 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -86,7 +86,6 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select UDK_202005_BINDING select DISPLAY_FSP_VERSION_INFO - select HECI_DISABLE_USING_SMM config ALDERLAKE_CAR_ENHANCED_NEM bool