mb/google/nissa/var/craask: Add ambient thermal sensor settings
BUG=b:239495499 TEST=emerge-nissa coreboot Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com> Change-Id: I026a8b3e1a27bedc3e0082e15e80a74a2f8adfda Reviewed-on: https://review.coreboot.org/c/coreboot/+/69197 Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Vidya Gopalakrishnan <vidya.gopalakrishnan@intel.com>
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@ -124,6 +124,7 @@ chip soc/intel/alderlake
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## sensor information
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## sensor information
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register "options.tsr[0].desc" = ""Memory""
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register "options.tsr[0].desc" = ""Memory""
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register "options.tsr[1].desc" = ""Charger""
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register "options.tsr[1].desc" = ""Charger""
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register "options.tsr[2].desc" = ""Ambient""
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# TODO: below values are initial reference values only
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# TODO: below values are initial reference values only
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## Passive Policy
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## Passive Policy
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@ -131,6 +132,7 @@ chip soc/intel/alderlake
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[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
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[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000),
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000),
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[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000),
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}"
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}"
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## Critical Policy
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## Critical Policy
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@ -138,6 +140,7 @@ chip soc/intel/alderlake
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
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[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
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}"
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}"
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register "controls.power_limits" = "{
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register "controls.power_limits" = "{
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