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mb/google/brya/vell: Enable USB2 port for KBD MCU 

Vell has a keyboard MCU connected to USB2 port 7. This patch enables
the port.

localhost# usb_updater2 -f
Found device.
found interface 0 endpoint 1, chunk_len 64
READY
-------
start
target running protocol version 6 (type 1)
maximum PDU size: 4096
Flash protection status: 0000
version:      prism_v2.0.12137+c4ae1432f5
key_version: 1
min_rollback: 0
offset: writable at 0xc000
Current versions:
Writable      prism_v2.0.12137+c4ae1432f5

BUG=b:203664745,b:211496726
TEST=Run 'usb_updater2 -f' on Vell.

Change-Id: Iad2140dbdf5e34332388f3f43b3ede3d22e73087
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62505
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Daisuke Nojiri 2022-01-10 10:41:17 -08:00 committed by Felix Held
parent 8dc28c48e1
commit c3dab9c427
1 changed files with 6 additions and 0 deletions
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6
src/mainboard/google/brya/variants/vell/overridetree.cb
View File

@ -50,6 +50,7 @@ chip soc/intel/alderlake
},
}"
register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)" # USB2_C3
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"
register "SaGv" = "SaGv_Enabled"
# I2C Port Config
@ -417,6 +418,11 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_INTERNAL"
device ref usb2_port6 on end
end
chip drivers/usb/acpi
register "desc" = ""RGB Keyboard""
register "type" = "UPC_TYPE_INTERNAL"
device ref usb2_port7 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 WWAN""
register "type" = "UPC_TYPE_INTERNAL"