mainboard/google/kahlee: Set EMMC reset pin to output low
While the pin was set to a pull-down, with the external pull-up, this wasn't enough to keep the pin low. Set to output low to drive to 0V. TEST=Boot grunt, verify EMMC_BRIDGE_RST is 0V. BUG=b:115661061 Change-Id: Ife014b8a879274df5d892c1de386976808de1df0 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/28649 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -54,7 +54,7 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = {
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PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE),
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/* GPIO_40 - EMMC_BRIDGE_RST */
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PAD_GPI(GPIO_40, PULL_DOWN),
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PAD_GPO(GPIO_40, LOW),
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/* GPIO_70 - WLAN_PE_RST_L */
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PAD_GPO(GPIO_70, HIGH),
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