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soc/amd/cezanne/acpi: use acpigen_write_processor_device 

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I77a91c0a6d937772bf25fa936cec8a710b9acf72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72491
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Felix Held 2023-01-28 04:15:57 +01:00
parent 281be57a55
commit c3fec864b6
1 changed files with 4 additions and 15 deletions
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19
src/soc/amd/cezanne/acpi.c
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@ -229,10 +229,10 @@ static size_t get_pstate_info(struct acpi_sw_pstate *pstate_values,
void generate_cpu_entries(const struct device *device) void generate_cpu_entries(const struct device *device)
{ {
int logical_cores; int logical_cores;
size_t pstate_count, cpu, proc_blk_len; size_t pstate_count, cpu;
struct acpi_sw_pstate pstate_values[MAX_PSTATES] = { {0} }; struct acpi_sw_pstate pstate_values[MAX_PSTATES] = { {0} };
struct acpi_xpss_sw_pstate pstate_xpss_values[MAX_PSTATES] = { {0} }; struct acpi_xpss_sw_pstate pstate_xpss_values[MAX_PSTATES] = { {0} };
uint32_t threads_per_core, proc_blk_addr; uint32_t threads_per_core;
uint32_t cstate_base_address = uint32_t cstate_base_address =
rdmsr(MSR_CSTATE_ADDRESS).lo & MSR_CSTATE_ADDRESS_MASK; rdmsr(MSR_CSTATE_ADDRESS).lo & MSR_CSTATE_ADDRESS_MASK;
@ -293,18 +293,7 @@ void generate_cpu_entries(const struct device *device)
logical_cores = get_cpu_count(); logical_cores = get_cpu_count();
for (cpu = 0; cpu < logical_cores; cpu++) { for (cpu = 0; cpu < logical_cores; cpu++) {
acpigen_write_processor_device(cpu);
if (cpu == 0) {
/* BSP values for \_SB.Pxxx */
proc_blk_len = 6;
proc_blk_addr = ACPI_GPE0_BLK;
} else {
/* AP values for \_SB.Pxxx */
proc_blk_addr = 0;
proc_blk_len = 0;
}
acpigen_write_processor(cpu, proc_blk_addr, proc_blk_len);
acpigen_write_pct_package(&perf_ctrl, &perf_sts); acpigen_write_pct_package(&perf_ctrl, &perf_sts);
@ -327,7 +316,7 @@ void generate_cpu_entries(const struct device *device)
generate_cppc_entries(cpu); generate_cppc_entries(cpu);
acpigen_pop_len(); acpigen_write_processor_device_end();
} }
acpigen_write_processor_package("PPKG", 0, logical_cores); acpigen_write_processor_package("PPKG", 0, logical_cores);