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Strago: Enable CA Mirror 

Configuring UPD PcdCaMirrorEn. This is a board specific parameter.
CA mirror is the Command Address mirroring option that is enabled
on this board

CQ-DEPEND=CL:13038

Original-Reviewed-on: https://chromium-review.googlesource.com/309190
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Hannah Williams <hannah.williams@intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

Change-Id: I05174e18d650332d838e5036c713e91c4840ee75
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/12749
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Shobhit Srivastava 2015-10-09 17:05:16 +05:30 committed by Martin Roth
parent 731e463495
commit c4153c1b15
3 changed files with 3 additions and 0 deletions
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1
src/mainboard/intel/strago/devicetree.cb
View File

@ -13,6 +13,7 @@ chip soc/intel/braswell
register "PcdApertureSize" = "2" register "PcdApertureSize" = "2"
register "PcdGttSize" = "1" register "PcdGttSize" = "1"
register "PcdDvfsEnable" = "0" register "PcdDvfsEnable" = "0"
register "PcdCaMirrorEn" = "1"
############################################################ ############################################################
# Set the parameters for SiliconInit # Set the parameters for SiliconInit

1
src/soc/intel/braswell/chip.h
View File

@ -75,6 +75,7 @@ struct soc_intel_braswell_config {
UINT8 PcdGttSize; UINT8 PcdGttSize;
UINT8 PcdLegacySegDecode; UINT8 PcdLegacySegDecode;
UINT8 PcdDvfsEnable; UINT8 PcdDvfsEnable;
UINT8 PcdCaMirrorEn; /* Command Address Mirroring Enabled */
/* /*
* The following fields come from fsp_vpd.h .aka. VpdHeader.h. * The following fields come from fsp_vpd.h .aka. VpdHeader.h.

1
src/soc/intel/braswell/romstage/romstage.c
View File

@ -212,6 +212,7 @@ void soc_memory_init_params(struct romstage_params *params,
upd->PcdGttSize = config->PcdGttSize; upd->PcdGttSize = config->PcdGttSize;
upd->PcdLegacySegDecode = config->PcdLegacySegDecode; upd->PcdLegacySegDecode = config->PcdLegacySegDecode;
upd->PcdDvfsEnable = config->PcdDvfsEnable; upd->PcdDvfsEnable = config->PcdDvfsEnable;
upd->PcdCaMirrorEn = config->PcdCaMirrorEn;
} }
void soc_display_memory_init_params(const MEMORY_INIT_UPD *old, void soc_display_memory_init_params(const MEMORY_INIT_UPD *old,