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cpu/x86: Move checking for MTRR's as a proxy for proper CPU reset 

Checking for empty MTRR_DEF_TYPE_MSR as a proxy for proper CPU reset
is common across multiple platforms. Therefore place it in a common
location.

Change-Id: I81d82fb9fe27cd9de6085251fe1a5685cdd651fc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32319
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Arthur Heymans 2019-04-14 18:38:35 +02:00 committed by Martin Roth
parent 0800194f95
commit c4772b9fd7
3 changed files with 48 additions and 15 deletions
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45
src/cpu/x86/early_reset.S Normal file
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@ -0,0 +1,45 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/*
* input %esp: return address (not pointer to return address!)
* clobber the content of eax, ecx, edx
*/
#include <cpu/x86/mtrr.h>
.section .text
.global check_mtrr
check_mtrr:
/* Use the MTRR default type MSR as a proxy for detecting INIT#.
* Reset the system if any known bits are set in that MSR. That is
* an indication of the CPU not being properly reset. */
check_for_clean_reset:
movl $MTRR_DEF_TYPE_MSR, %ecx
rdmsr
andl $(MTRR_DEF_TYPE_EN | MTRR_DEF_TYPE_FIX_EN), %eax
cmp $0, %eax
jnz warm_reset
jmp *%esp
/* perform warm reset */
warm_reset:
movw $0xcf9, %dx
movb $0x06, %al
outb %al, %dx
/* Should not reach this*/
.Lhlt:
hlt
jmp .Lhlt

1
src/soc/intel/common/block/cpu/Makefile.inc
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@ -1,4 +1,5 @@
bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/cache_as_ram.S
bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += ../../../../../cpu/x86/early_reset.S
bootblock-$(CONFIG_FSP_CAR)+= car/cache_as_ram_fsp.S
bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c

17
src/soc/intel/common/block/cpu/car/cache_as_ram.S
View File

@ -28,21 +28,8 @@ bootblock_pre_c_entry:
post_code(0x20)
/*
* Use the MTRR default type MSR as a proxy for detecting INIT#.
* Reset the system if any known bits are set in that MSR. That is
* an indication of the CPU not being properly reset.
*/
check_for_clean_reset:
mov $MTRR_DEF_TYPE_MSR, %ecx
rdmsr
and $(MTRR_DEF_TYPE_EN | MTRR_DEF_TYPE_FIX_EN), %eax
cmp $0, %eax
jz no_reset
/* perform warm reset */
movw $0xcf9, %dx
movb $0x06, %al
outb %al, %dx
movl $no_reset, %esp /* return address */
jmp check_mtrr /* Check if CPU properly reset */
no_reset:
post_code(0x21)