mb/google/brya/var/banshee: Update the FIVR configurations

This patch enables V1p05 and Vnn external bypass VRs for Banshee.

BUG=b:207116793
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: Idb56890db40f90f163d8dadf5bf7c7335469771a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63860
Reviewed-by: Derek Huang <derek.huang@intel.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Frank Wu 2022-04-26 16:13:41 +08:00 committed by Felix Held
parent 2f4246ab0c
commit c4af5e4009
1 changed files with 14 additions and 0 deletions

View File

@ -22,6 +22,20 @@ chip soc/intel/alderlake
},
}"
register "ext_fivr_settings" = "{
.configure_ext_fivr = 1,
.v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
.v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
FIVR_VOLTAGE_MIN_ACTIVE |
FIVR_VOLTAGE_MIN_RETENTION,
.vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
FIVR_VOLTAGE_MIN_ACTIVE |
FIVR_VOLTAGE_MIN_RETENTION,
.v1p05_icc_max_ma = 500,
.vnn_sx_voltage_mv = 1250,
}"
register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable Port 3
register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable Port 4
register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable Port 6