soc/intel: Drop aliases on MMCONF_BASE_ADDRESS
Change-Id: I5ba60c1d8c314d37b4ef71c4613e6e0629da8149 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50662 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -12,9 +12,6 @@
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/*
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* Memory-mapped I/O registers.
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*/
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#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
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#define MCFG_BASE_SIZE 0x4000000
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#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
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#define PCH_PRESERVED_BASE_SIZE 0x02000000
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@ -6,9 +6,6 @@
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/*
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* Memory-mapped I/O registers.
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*/
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#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
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#define MCFG_BASE_SIZE 0x4000000
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#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
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#define PCH_PRESERVED_BASE_SIZE 0x02000000
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@ -6,9 +6,6 @@
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/*
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* Memory-mapped I/O registers.
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*/
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#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
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#define MCFG_BASE_SIZE 0x4000000
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#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
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#define PCH_PRESERVED_BASE_SIZE 0x02000000
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@ -6,9 +6,6 @@
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/*
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* Memory-mapped I/O registers.
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*/
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#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
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#define MCFG_BASE_SIZE 0x4000000
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#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
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#define PCH_PRESERVED_BASE_SIZE 0x02000000
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@ -6,9 +6,6 @@
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/*
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* Memory-mapped I/O registers.
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*/
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#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
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#define MCFG_BASE_SIZE 0x4000000
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#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
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#define PCH_PRESERVED_BASE_SIZE 0x02000000
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@ -12,9 +12,6 @@
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/*
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* Memory-mapped I/O registers.
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*/
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#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
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#define MCFG_BASE_SIZE 0x4000000
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#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
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#define PCH_PRESERVED_BASE_SIZE 0x02000000
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