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soc/intel: Drop aliases on MMCONF_BASE_ADDRESS 

Change-Id: I5ba60c1d8c314d37b4ef71c4613e6e0629da8149
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kyösti Mälkki 2021-02-14 14:01:55 +02:00 committed by Patrick Georgi
parent 4ef37ae68d
commit c4b3903361
6 changed files with 0 additions and 18 deletions
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3
src/soc/intel/alderlake/include/soc/iomap.h
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@ -12,9 +12,6 @@
/* /*
* Memory-mapped I/O registers. * Memory-mapped I/O registers.
*/ */
#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
#define MCFG_BASE_SIZE 0x4000000
#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000 #define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
#define PCH_PRESERVED_BASE_SIZE 0x02000000 #define PCH_PRESERVED_BASE_SIZE 0x02000000

3
src/soc/intel/cannonlake/include/soc/iomap.h
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@ -6,9 +6,6 @@
/* /*
* Memory-mapped I/O registers. * Memory-mapped I/O registers.
*/ */
#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
#define MCFG_BASE_SIZE 0x4000000
#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000 #define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
#define PCH_PRESERVED_BASE_SIZE 0x02000000 #define PCH_PRESERVED_BASE_SIZE 0x02000000

3
src/soc/intel/elkhartlake/include/soc/iomap.h
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@ -6,9 +6,6 @@
/* /*
* Memory-mapped I/O registers. * Memory-mapped I/O registers.
*/ */
#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
#define MCFG_BASE_SIZE 0x4000000
#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000 #define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
#define PCH_PRESERVED_BASE_SIZE 0x02000000 #define PCH_PRESERVED_BASE_SIZE 0x02000000

3
src/soc/intel/icelake/include/soc/iomap.h
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@ -6,9 +6,6 @@
/* /*
* Memory-mapped I/O registers. * Memory-mapped I/O registers.
*/ */
#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
#define MCFG_BASE_SIZE 0x4000000
#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000 #define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
#define PCH_PRESERVED_BASE_SIZE 0x02000000 #define PCH_PRESERVED_BASE_SIZE 0x02000000

3
src/soc/intel/jasperlake/include/soc/iomap.h
View File

@ -6,9 +6,6 @@
/* /*
* Memory-mapped I/O registers. * Memory-mapped I/O registers.
*/ */
#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
#define MCFG_BASE_SIZE 0x4000000
#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000 #define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
#define PCH_PRESERVED_BASE_SIZE 0x02000000 #define PCH_PRESERVED_BASE_SIZE 0x02000000

3
src/soc/intel/tigerlake/include/soc/iomap.h
View File

@ -12,9 +12,6 @@
/* /*
* Memory-mapped I/O registers. * Memory-mapped I/O registers.
*/ */
#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
#define MCFG_BASE_SIZE 0x4000000
#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000 #define PCH_PRESERVED_BASE_ADDRESS 0xfc800000
#define PCH_PRESERVED_BASE_SIZE 0x02000000 #define PCH_PRESERVED_BASE_SIZE 0x02000000