mainboard/elmex: Add new board pcm205400
pcm205400 is CPU board equipped with T56N of AMD. We used SeaBIOS and Windows Embedded Standard 7 to test pcm205400. I disable the port5, 6, and 7 of the PCI-e in elmex/pcm205400/PlatformGnbPcieComplex.h. I disable the audio capabilities at the 236th line of elmex/pcm205400/platform_cfg.h. Coding style is modified to avoid the error and warning that occur when I commit. Change-Id: I77cb76903fe3c1b500a306426f5399936382695b Signed-off-by: Yuichi Ito <yui.corebt@gmail.com> Reviewed-on: https://review.coreboot.org/15929 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Yuichi Ito
Kyösti Mälkki
parent
b31c3d1b92
commit
c4ddfe45a8
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@ -61,14 +61,9 @@ config VGA_BIOS
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bool
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default n
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#config VGA_BIOS_FILE
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# string "VGA BIOS path and filename"
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# depends on VGA_BIOS
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# default "rom/video/OntarioGenericVbios.bin"
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config VGA_BIOS_ID
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string
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default "1002,9802"
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default "1002,9806" # FUSION_G_T56N
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config SB800_AHCI_ROM
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bool
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@ -21,45 +21,85 @@
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#include "amdlib.h"
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#include <cpu/amd/agesa/s3_resume.h>
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//GNB GPP Port4
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#define GNB_GPP_PORT4_PORT_PRESENT 1 //0:Disable 1:Enable
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#define GNB_GPP_PORT4_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
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#define GNB_GPP_PORT4_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
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#define GNB_GPP_PORT4_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
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//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
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#define GNB_GPP_PORT4_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
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/*
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* GNB GPP Port4
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* GNB_GPP_PORT4_PORT_PRESENT 0:Disable 1:Enable
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* GNB_GPP_PORT4_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
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* GNB_GPP_PORT4_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
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* GNB_GPP_PORT4_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
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* 2:Half-swing(0db) 3:Half-swing(-3.5db)
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* 4:extended length(-6db) 5:extended length(-8db)
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* GNB_GPP_PORT4_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
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*/
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#define GNB_GPP_PORT4_PORT_PRESENT 1
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#define GNB_GPP_PORT4_SPEED_MODE 2
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#define GNB_GPP_PORT4_LINK_ASPM 3
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#define GNB_GPP_PORT4_CHANNEL_TYPE 4
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#define GNB_GPP_PORT4_HOTPLUG_SUPPORT 0
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//GNB GPP Port5
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#define GNB_GPP_PORT5_PORT_PRESENT 1 //0:Disable 1:Enable
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#define GNB_GPP_PORT5_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
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#define GNB_GPP_PORT5_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
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#define GNB_GPP_PORT5_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
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//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
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#define GNB_GPP_PORT5_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
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/*
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* GNB GPP Port5
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* GNB_GPP_PORT5_PORT_PRESENT 0:Disable 1:Enable
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* GNB_GPP_PORT5_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
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* GNB_GPP_PORT5_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
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* GNB_GPP_PORT5_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
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* 2:Half-swing(0db) 3:Half-swing(-3.5db)
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* 4:extended length(-6db) 5:extended length(-8db)
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* GNB_GPP_PORT5_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
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*/
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#define GNB_GPP_PORT5_PORT_PRESENT 0
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#define GNB_GPP_PORT5_SPEED_MODE 2
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#define GNB_GPP_PORT5_LINK_ASPM 3
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#define GNB_GPP_PORT5_CHANNEL_TYPE 4
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#define GNB_GPP_PORT5_HOTPLUG_SUPPORT 0
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//GNB GPP Port6
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#define GNB_GPP_PORT6_PORT_PRESENT 1 //0:Disable 1:Enable
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#define GNB_GPP_PORT6_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
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#define GNB_GPP_PORT6_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
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#define GNB_GPP_PORT6_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
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//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
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#define GNB_GPP_PORT6_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
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/*
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* GNB GPP Port6
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* GNB_GPP_PORT6_PORT_PRESENT 0:Disable 1:Enable
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* GNB_GPP_PORT6_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
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* GNB_GPP_PORT6_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
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* GNB_GPP_PORT6_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
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* 2:Half-swing(0db) 3:Half-swing(-3.5db)
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* 4:extended length(-6db) 5:extended length(-8db)
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* GNB_GPP_PORT6_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
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*/
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#define GNB_GPP_PORT6_PORT_PRESENT 0
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#define GNB_GPP_PORT6_SPEED_MODE 2
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#define GNB_GPP_PORT6_LINK_ASPM 3
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#define GNB_GPP_PORT6_CHANNEL_TYPE 4
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#define GNB_GPP_PORT6_HOTPLUG_SUPPORT 0
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//GNB GPP Port7
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#define GNB_GPP_PORT7_PORT_PRESENT 0 //0:Disable 1:Enable
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#define GNB_GPP_PORT7_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
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#define GNB_GPP_PORT7_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
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#define GNB_GPP_PORT7_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
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//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
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#define GNB_GPP_PORT7_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
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/*
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* GNB GPP Port7
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* GNB_GPP_PORT7_PORT_PRESENT 0:Disable 1:Enable
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* GNB_GPP_PORT7_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
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* GNB_GPP_PORT7_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
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* GNB_GPP_PORT7_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
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* 2:Half-swing(0db) 3:Half-swing(-3.5db)
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* 4:extended length(-6db) 5:extended length(-8db)
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* GNB_GPP_PORT7_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
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*/
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#define GNB_GPP_PORT7_PORT_PRESENT 0
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#define GNB_GPP_PORT7_SPEED_MODE 2
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#define GNB_GPP_PORT7_LINK_ASPM 3
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#define GNB_GPP_PORT7_CHANNEL_TYPE 4
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#define GNB_GPP_PORT7_HOTPLUG_SUPPORT 0
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//GNB GPP Port8
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#define GNB_GPP_PORT8_PORT_PRESENT 1 //0:Disable 1:Enable
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#define GNB_GPP_PORT8_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
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#define GNB_GPP_PORT8_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
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#define GNB_GPP_PORT8_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
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//3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
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#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
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/*
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* GNB GPP Port8
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* GNB_GPP_PORT8_PORT_PRESENT 0:Disable 1:Enable
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* GNB_GPP_PORT8_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
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* GNB_GPP_PORT8_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
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* GNB_GPP_PORT8_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
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* 2:Half-swing(0db) 3:Half-swing(-3.5db)
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* 4:extended length(-6db) 5:extended length(-8db)
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* GNB_GPP_PORT8_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
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*/
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#define GNB_GPP_PORT8_PORT_PRESENT 1
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#define GNB_GPP_PORT8_SPEED_MODE 2
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#define GNB_GPP_PORT8_LINK_ASPM 3
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#define GNB_GPP_PORT8_CHANNEL_TYPE 4
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#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0
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#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
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@ -1,5 +1,5 @@
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Board name: DBFT1-00-EVAL-KT (Persimmon)
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Category: eval
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Board name: PCM205400
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Category: sbc
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ROM protocol: SPI
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ROM socketed: n
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Flashrom support: y
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@ -47,7 +47,7 @@ chip northbridge/amd/agesa/family14/root_complex
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end
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end # SM
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device pci 14.1 on end # IDE 0x439c
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device pci 14.2 on end # HDA 0x4383
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device pci 14.2 off end # HDA 0x4383
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device pci 14.3 on # LPC 0x439d
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chip superio/fintek/f81865f
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device pnp 4e.0 off # Floppy
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@ -57,11 +57,7 @@ chip northbridge/amd/agesa/family14/root_complex
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end
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device pnp 4e.3 off end # Parallel Port
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device pnp 4e.4 off end # Hardware Monitor
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device pnp 4e.5 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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end
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device pnp 4e.5 off end # Keyboard
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device pnp 4e.6 off end # GPIO
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device pnp 4e.a off end # PME
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device pnp 4e.10 on # COM1
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@ -208,8 +208,7 @@
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*/
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#define GEC_CONFIG 0
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static const CODECENTRY persimmon_codec_alc269[] =
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{
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static const CODECENTRY persimmon_codec_alc269[] = {
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/* NID, PinConfig */
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{0x12, 0x411111F0},
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{0x14, 0x99130110},
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@ -225,17 +224,16 @@ static const CODECENTRY persimmon_codec_alc269[] =
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{0xff, 0xffffffff} /* end of table */
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};
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static const CODECTBLLIST codec_tablelist[] =
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{
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{0x010ec0269, (CODECENTRY*)&persimmon_codec_alc269[0]},
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{0x0FFFFFFFFUL, (CODECENTRY*)0x0FFFFFFFFUL}
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static const CODECTBLLIST codec_tablelist[] = {
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{0x010ec0269, (CODECENTRY *)&persimmon_codec_alc269[0]},
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{0x0FFFFFFFFUL, (CODECENTRY *)0x0FFFFFFFFUL}
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};
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/**
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* @def AZALIA_OEM_VERB_TABLE
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* Mainboard specific codec verb table list
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*/
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#define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0])
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//#define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0])
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/* set up an ACPI preferred power management profile */
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/* from acpi.h
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